公开(公告)号：US20240237345A1

公开(公告)日：2024-07-11

申请号：US18355860

申请日：2023-07-20

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Kazuyuki IWATA ,  Yusuke IKAWA ,  Kei SAMURA ,  Zhiwei CHEN

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A three-dimensional memory device includes a first-tier alternating stack of first insulating layers and first electrically conductive layers, a second-tier alternating stack of second insulating layers and second electrically conductive layers overlying the first-tier alternating stack, memory openings vertically extending through the second-tier alternating stack and the first-tier alternating stack, memory opening fill structures located in the memory openings, wherein each of the memory opening fill structures includes a respective vertical stack of memory elements and a respective vertical semiconductor channel including a respective portion of a semiconductor material, and hybrid support structures vertically extending at least through a respective subset of layers within the first-tier alternating stack. Each of the hybrid support structures includes a respective vertical stack of a dielectric support pillar and a composite support pillar having a respective dielectric outer surface and including a respective additional portion of the semiconductor material.