摘要:
A method is disclosed for transmission of register contents of a CT detector with hierarchical hardware structure, wherein the first hierarchy level is formed by a control unit containing a register table for the read-out register contents of FPGAs lying lower down in the hierarchy and an intermediate register store for register contents to be written. With each new reading, the new register contents for FPGAs lying lower down in the hierarchy arriving during the respective preceding reading from the central control at the control unit are forwarded to the next hierarchy level. With each new reading, the register contents of all FPGAs lying lower down in the hierarchy are re-entered into the register table of the control unit. Finally, in the event of a readout command transferred asynchronously from the central control, the register contents are read out exclusively from the register table.