Chip matching system and method thereof

    公开(公告)号:US11532495B2

    公开(公告)日:2022-12-20

    申请号:US17073783

    申请日:2020-10-19

    Abstract: A chip matching system and a corresponding method are provided. The method defines a plurality of first electronic components in a first wafer as various grades of chips and defines a plurality of second electronic components in a second wafer as various grades of chips, and then grades of the first electronic components and the second electronic components are matched to generate target information, and finally the first and second electronic components are integrated in the same position according to the target information. Therefore, the highest-grade chips can be arranged in a multi-chip module to optimize the quality of the multi-chip module.

    CHIP MATCHING SYSTEM AND METHOD THEREOF

    公开(公告)号:US20220068680A1

    公开(公告)日:2022-03-03

    申请号:US17073783

    申请日:2020-10-19

    Abstract: A chip matching system and a corresponding method are provided. The method defines a plurality of first electronic components in a first wafer as various grades of chips and defines a plurality of second electronic components in a second wafer as various grades of chips, and then grades of the first electronic components and the second electronic components are matched to generate target information, and finally the first and second electronic components are integrated in the same position according to the target information. Therefore, the highest-grade chips can be arranged in a multi-chip module to optimize the quality of the multi-chip module.

    Chip matching system and method thereof

    公开(公告)号:US12046494B2

    公开(公告)日:2024-07-23

    申请号:US17988286

    申请日:2022-11-16

    CPC classification number: H01L21/67271 H01L21/67144

    Abstract: A chip matching system and a corresponding method are provided. The method defines a plurality of first electronic components in a first wafer as various grades of chips and defines a plurality of second electronic components in a second wafer as various grades of chips, and then grades of the first electronic components and the second electronic components are matched to generate target information, and finally the first and second electronic components are integrated in the same position according to the target information. Therefore, the highest-grade chips can be arranged in a multi-chip module to optimize the quality of the multi-chip module.

    CHIP MATCHING SYSTEM AND METHOD THEREOF

    公开(公告)号:US20230076941A1

    公开(公告)日:2023-03-09

    申请号:US17988286

    申请日:2022-11-16

    Abstract: A chip matching system and a corresponding method are provided. The method defines a plurality of first electronic components in a first wafer as various grades of chips and defines a plurality of second electronic components in a second wafer as various grades of chips, and then grades of the first electronic components and the second electronic components are matched to generate target information, and finally the first and second electronic components are integrated in the same position according to the target information. Therefore, the highest-grade chips can be arranged in a multi-chip module to optimize the quality of the multi-chip module.

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