公开(公告)号：US20240315151A1

公开(公告)日：2024-09-19

申请号：US18448486

申请日：2023-08-11

Applicant: SK hynix Inc.

Inventor： Yong Hun SUNG

IPC: H10N70/00 ,  H10B63/00

CPC classification number: H10N70/841 ,  H10B63/80 ,  H10N70/021 ,  H10N70/8845

Abstract: A method for fabricating a semiconductor device includes forming a lower electrode layer containing carbon by applying AC power; forming a memory layer over the lower electrode layer; and forming an upper electrode layer containing carbon over the memory layer without applying AC power.

公开(公告)号：US20220328762A1

公开(公告)日：2022-10-13

申请号：US17467084

申请日：2021-09-03

Applicant: SK hynix Inc.

Inventor： Ji Sun HAN ,  Yong Hun SUNG ,  Byung Jick CHO

IPC: H01L45/00 ,  H01L27/24

Abstract: An electronic device comprises a semiconductor memory that includes: a first line; a second line disposed over the first line to be spaced apart from the first line; a variable resistance layer disposed between the first line and the second line; a first electrode layer disposed between the first line and the variable resistance layer; and a first oxide layer disposed between the variable resistance layer and the first electrode layer. The first electrode layer includes a first carbon material doped with a first element, and the first oxide layer includes a first oxide of the first element.

公开(公告)号：US20220310916A1

公开(公告)日：2022-09-29

申请号：US17369725

申请日：2021-07-07

Applicant: SK hynix Inc.

Inventor： Byung Jick CHO ,  Yong Hun SUNG ,  Ji Sun HAN

IPC: H01L45/00 ,  G06F12/0831 ,  H01L27/24

Abstract: An electronic device comprises a semiconductor memory that includes: a first line; a second line disposed over the first line to be spaced apart from the first line; a variable resistance layer disposed between the first line and the second line; a selection element layer disposed between the first line and the variable resistance layer or between the second line and the variable resistance layer; and one or more electrode layers disposed over or under the selection element layer or disposed over and under the selection element layer, the one or more electrode layers being adjacent to the selection element layer, wherein each of the one or more electrode layers includes a first electrode layer and a second electrode layer, the second electrode layer including a second carbon layer containing nitrogen, the first electrode layer including a first carbon layer containing a lower concentration of nitrogen or containing no nitrogen.

公开(公告)号：US20150263282A1

公开(公告)日：2015-09-17

申请号：US14296133

申请日：2014-06-04

Applicant: SK Hynix Inc.

Inventor： Yong Hun SUNG ,  Kwon HONG ,  Su Jin CHAE ,  Hyun Seok KANG ,  Ji Won MOON

IPC: H01L45/00 ,  H01L21/285

CPC classification number: H01L45/16 ,  H01L21/28518 ,  H01L21/28562 ,  H01L27/2454 ,  H01L45/06 ,  H01L45/1233

Abstract: A method for fabricating a semiconductor apparatus includes setting a semiconductor substrate in a process chamber, increasing an internal temperature of the process chamber to a predetermined temperature for pyrolyzing a source gas, supplying the source gas to the inside of the process chamber and pyrolyzing ions of the source gas to remain on the semiconductor substrate, and forming the ohmic contact layer by supplying a reaction gas to the inside of the process chamber, wherein the reaction gas is reacted with non-metal ions pyrolyzed from source gas.

Abstract translation: 一种半导体装置的制造方法，其特征在于，在处理室内设置半导体基板，将处理室的内部温度上升到规定温度，使源气体进行热解，将原料气体供给到处理室内部， 源气体保留在半导体衬底上，并通过向处理室的内部提供反应气体形成欧姆接触层，其中反应气体与从源气体热解的非金属离子反应。