公开(公告)号：US20190181132A1

公开(公告)日：2019-06-13

申请号：US16277161

申请日：2019-02-15

Applicant: SOCIONEXT INC.

Inventor： Teruo Suzuki

IPC: H01L27/02

Abstract: A semiconductor device includes: a first domain including a first high power source line, a first low power source line, and a first power clamp circuit; a second domain including a second high power source line, a second low power source line, and a second power clamp circuit; a third power clamp circuit provided between the second high power source line and the first low power source line; a first relay circuit that receives a signal from the first domain and outputs the signal to the second domain; and a second relay circuit that receives a signal from the second domain and outputs the signal to the first domain, wherein the first relay circuit and the second relay circuit have a circuit portion that is connected to the second high power source line and the first low power source line.

公开(公告)号：US11348914B2

公开(公告)日：2022-05-31

申请号：US16277161

申请日：2019-02-15

Applicant: SOCIONEXT INC.

Inventor： Teruo Suzuki

IPC: H01L27/02

Abstract: A semiconductor device includes: a first domain including a first high power source line, a first low power source line, and a first power clamp circuit; a second domain including a second high power source line, a second low power source line, and a second power clamp circuit; a third power clamp circuit provided between the second high power source line and the first low power source line; a first relay circuit that receives a signal from the first domain and outputs the signal to the second domain; and a second relay circuit that receives a signal from the second domain and outputs the signal to the first domain, wherein the first relay circuit and the second relay circuit have a circuit portion that is connected to the second high power source line and the first low power source line.

公开(公告)号：US10249606B2

公开(公告)日：2019-04-02

申请号：US15169002

申请日：2016-05-31

Applicant: SOCIONEXT INC.

Inventor： Teruo Suzuki

IPC: H02H9/00 ,  H01L27/02

Abstract: A semiconductor device includes: a first domain including a first high power source line, a first low power source line, and a first power clamp circuit; a second domain including a second high power source line, a second low power source line, and a second power clamp circuit; a third power clamp circuit provided between the second high power source line and the first low power source line; a first relay circuit that receives a signal from the first domain and outputs the signal to the second domain; and a second relay circuit that receives a signal from the second domain and outputs the signal to the first domain, wherein the first relay circuit and the second relay circuit have a circuit portion that is connected to the second high power source line and the first low power source line.

公开(公告)号：US09559094B2

公开(公告)日：2017-01-31

申请号：US14724485

申请日：2015-05-28

Applicant: SOCIONEXT INC.

Inventor： Teruo Suzuki

IPC: H01L23/62 ,  H01L27/02

CPC classification number: H01L27/027 ,  H01L27/0255

Abstract: A semiconductor device includes a first semiconductor region that has an external profile including at least one corner, and that includes a semiconductor of a first conductivity type, and a first insulation region that surrounds an outer periphery of the first semiconductor region, and that includes an insulator that, at a corner portion corresponding to the corner, has a depth deeper than a depth at a location other than the corner portion. The semiconductor device further includes a second semiconductor region that surrounds an outer periphery of the first insulation region, and that includes a semiconductor of a second conductivity type, and a second insulation region that surrounds an outer periphery of the second semiconductor region, and that includes an insulator that is deeper than the depth of the first insulation region at the location other than the corner portion.

Abstract translation: 半导体器件包括：第一半导体区域，其具有包括至少一个角部的外部轮廓，并且包括第一导电类型的半导体;以及包围第一半导体区域的外周的第一绝缘区域， 在角部对应的角部具有深度比在角部以外的位置的深度更深的绝缘体。 半导体器件还包括第二半导体区域，该第二半导体区域包围第一绝缘区域的外周，并且包括第二导电类型的半导体和围绕第二半导体区域的外周的第二绝缘区域，并且包括 绝缘体比在角部以外的位置处的第一绝缘区域的深度更深。

公开(公告)号：US20160372453A1

公开(公告)日：2016-12-22

申请号：US15169002

申请日：2016-05-31

Applicant: SOCIONEXT INC.

Inventor： Teruo Suzuki

IPC: H01L27/02 ,  H01L23/50

CPC classification number: H01L27/0255 ,  H01L27/027

Abstract: A semiconductor device includes: a first domain including a first high power source line, a first low power source line, and a first power clamp circuit; a second domain including a second high power source line, a second low power source line, and a second power clamp circuit; a third power clamp circuit provided between the second high power source line and the first low power source line; a first relay circuit that receives a signal from the first domain and outputs the signal to the second domain; and a second relay circuit that receives a signal from the second domain and outputs the signal to the first domain, wherein the first relay circuit and the second relay circuit have a circuit portion that is connected to the second high power source line and the first low power source line.

Abstract translation: 半导体器件包括：包括第一高电源线，第一低电源线和第一功率钳位电路的第一域; 第二区域，包括第二高功率源线，第二低功率源线和第二功率钳位电路; 第三功率钳位电路，设置在第二高电源线和第一低电源线之间; 第一继电器电路，其从所述第一域接收信号并将所述信号输出到所述第二域; 以及第二继电器电路，其接收来自所述第二域的信号并将所述信号输出到所述第一域，其中所述第一继电器电路和所述第二继电器电路具有连接到所述第二高电源线的电路部分和所述第一低电平 电源线。