公开(公告)号：US20240113147A1

公开(公告)日：2024-04-04

申请号：US18526681

申请日：2023-12-01

Applicant: SOCPRA SCIENCES ET GENIE S.E.C.

Inventor： Jean-François PRATTE ,  Samuel PARENT ,  Serge CHARLEBOIS ,  Henri DAUTET

IPC: H01L27/146 ,  H01L31/107

CPC classification number: H01L27/14636 ,  H01L27/1463 ,  H01L31/107

Abstract: This disclosure pertains to a new thinned down frontside illuminated 3D SiPM architecture, e.g. a Photon-to-Digital Converter, with direct interconnect layers between the SPAD and the CMOS. The described architecture removes the need to have through-silicon-vias. Additionally, this new architecture also provides low jitter operation of the SPADs. The architecture described herein, with extended isolation trenches through the entire thickness of the thinned down SPAD substrate, enables both the SPAD cell to be electrically and optically isolated from the other SPAD cells. As such, the crosstalk is minimized and direct backside connection is possible.