公开(公告)号：US20180350615A1

公开(公告)日：2018-12-06

申请号：US15995184

申请日：2018-06-01

Applicant: SPTS TECHNOLOGIES LIMITED

Inventor： Oliver J. ANSELL ,  Martin HANICINEC ,  Janet HOPKINS

IPC: H01L21/3065 ,  H01L21/78 ,  H01L21/683

CPC classification number: H01L21/78

Abstract: A method is for plasma etching one or more dicing lanes in a silicon substrate having a backside metal layer attached thereto. The method includes performing a main etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated to produce dicing lanes having scalloped sidewalls, and switching to performing a secondary etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated until the backside metal layer is reached. The amount of silicon removed in one etch step during the secondary etch is half or less than half of the amount of silicon removed in one etch step during the main etch.