公开(公告)号：US09172339B2

公开(公告)日：2015-10-27

申请号：US14136469

申请日：2013-12-20

Applicant: ST-Ericsson SA

Inventor： Vincent Binet ,  Emmanuel Allier ,  Francois Amiard

IPC: H03F3/217 ,  H03F1/02 ,  H03F3/72

CPC classification number: H03F3/2171 ,  H03F1/0277 ,  H03F3/2173 ,  H03F3/72 ,  H03F2203/7206 ,  H03F2203/7236

Abstract: There is disclosed a driver circuit for a power amplifier of class D type having a segmented architecture with at least one current branch which can be powered down in a low power mode of operation of the circuit. The branch comprising a switch with a cascode MOS transistor, the circuit further comprises a bias circuitry adapted for dynamically generating a dynamic bias control signal so as to cause the cascode MOS transistor of the switch to be ‘Off’ in the low power mode.

Abstract translation: 公开了一种用于D类功率放大器的驱动电路，该驱动电路具有分段结构，具有至少一个电流分支，该电流分支可在该电路的低功率工作模式下掉电。 所述分支包括具有共源共栅MOS晶体管的开关，所述电路还包括偏置电路，所述偏置电路适于动态产生动态偏置控制信号，以使所述开关的共源共栅MOS晶体管处于低功率模式中的“关”。