公开(公告)号：US09325297B2

公开(公告)日：2016-04-26

申请号：US14426762

申请日：2013-09-25

Applicant: ST-Ericsson SA

Inventor： Markus Suhonen

IPC: H04L27/00 ,  H03K3/012 ,  H03K5/06 ,  G05F1/66 ,  H04L7/00

CPC classification number: H03K3/012 ,  G05F1/66 ,  G06F1/04 ,  G06F1/3206 ,  H03K5/06 ,  H03K5/133 ,  H03K5/135 ,  H04L7/0037 ,  H04L7/0087 ,  H04L7/0091

Abstract: An integrated circuit includes a clock generation stage that generates a clock signal having a clock frequency dependent on a reference signal. A delay stage generates a delayed clock signal by delaying the clock signal. A control stage generates a control signal indicative of a delay of the delayed clock signal relative to the clock signal. A frequency divider generates a divided signal by dividing a dividend signal having a dividend frequency dependent on the reference signal. A power supply regulator supplies power to the frequency divider at a first power level, which is dependent on the control signal.

Abstract translation: 集成电路包括产生具有取决于参考信号的时钟频率的时钟信号的时钟产生级。 延迟级通过延迟时钟信号来产生延迟的时钟信号。 控制级产生指示延迟的时钟信号相对于时钟信号的延迟的控制信号。 分频器通过除除具有取决于参考信号的除数频率的除数信号来产生分频信号。 电源调节器以第一功率电平为分频器供电，这取决于控制信号。

公开(公告)号：US20150236677A1

公开(公告)日：2015-08-20

申请号：US14426762

申请日：2013-09-25

Applicant: ST-Ericsson SA

Inventor： Markus Suhonen

IPC: H03K3/012 ,  G05F1/66 ,  H04L7/00 ,  H03K5/06

CPC classification number: H03K3/012 ,  G05F1/66 ,  G06F1/04 ,  G06F1/3206 ,  H03K5/06 ,  H03K5/133 ,  H03K5/135 ,  H04L7/0037 ,  H04L7/0087 ,  H04L7/0091

Abstract: An integrated circuit (100) comprises a clock generation stage (120) arranged to generate a clock signal having a clock frequency dependent on a reference signal. A delay stage (130) is arranged to generate a Clock Generation Stage delayed clock signal by delaying the clock signal. A control stage (140) is arranged to generate a control signal indicative of a delay of the delayed clock signal relative to the clock signal. A frequency divider (150) arranged to generate a divided signal by dividing a dividend signal having a dividend frequency dependent on the reference signal. A power supply regulator (170) is arranged to supply power to the frequency divider (150) at a first power level, the first power level being dependent on the control signal. power supply controlpower supply control

Abstract translation: 集成电路（100）包括时钟发生级（120），其被布置为产生具有取决于参考信号的时钟频率的时钟信号。 延迟级（130）被布置成通过延迟时钟信号来产生时钟产生级延迟时钟信号。 控制级（140）被布置成产生指示延迟的时钟信号相对于时钟信号的延迟的控制信号。 一种分频器（150），被布置成通过除去具有取决于参考信号的除数频率的除数信号来产生分频信号。 电源调节器（170）被布置成以第一功率电平向分频器（150）供电，第一功率电平取决于控制信号。 电源控制电源控制