公开(公告)号：US20150139360A1

公开(公告)日：2015-05-21

申请号：US14401183

申请日：2013-06-18

Applicant: ST-Ericsson SA

Inventor： Hendrik Visser ,  Roeland Heijna

IPC: H04L27/36 ,  H04B14/00 ,  H04W52/02

CPC classification number: H04L27/36 ,  H03C5/00 ,  H04B14/008 ,  H04L27/361 ,  H04W52/0209 ,  Y02D70/122

Abstract: A polar modulator (200) comprises a modulation generator (10) arranged to generate phase modulation data and amplitude modulation data; and a phase modulation stage (20) arranged to generate a phase modulated, PM, carrier signal and a PM clock signal, wherein the PM carrier signal has a PM carrier signal frequency and the PM clock signal has a PM clock signal frequency, and the PM carrier signal frequency is higher than the PM clock signal frequency, the PM carrier signal and the PM clock signal are phase modulated by the phase modulation data, and the phase modulation stage (20) comprises an adjustable delay stage (50) arranged to adjust a relative delay between the PM carrier signal and the PM clock signal to a target value. The polar modulator (200) further comprises a re-timing circuit (40) arranged to generate an amplitude modulation, AM, clock signal by re-timing the PM clock signal with the PM carrier signal; an amplitude modulation stage (30) arranged to employ the AM clock signal to clock the amplitude modulation data into the amplitude modulation stage (30) and arranged to amplitude modulate the PM carrier signal with the amplitude modulation data; an error detection stage (60) arranged to generate an indication of a magnitude of a first deviation of the AM clock signal from a target condition; and a control stage (70) arranged to select the target value of the relative delay by determining, by controlling the adjustment of the relative delay by the adjustable delay stage (50), a first value of the relative delay that maximises the magnitude of the first deviation, and applying an offset to the first value of the relative delay.

Abstract translation: 极性调制器（200）包括调制发生器（10），其被配置为产生相位调制数据和幅度调制数据; 以及相位调制级（20），被配置为产生相位调制PM载波信号和PM时钟信号，其中所述PM载波信号具有PM载波信号频率，并且所述PM时钟信号具有PM时钟信号频率，并且 PM载波信号频率高于PM时钟信号频率，PM载波信号和PM时钟信号由相位调制数据相位调制，相位调制级（20）包括可调节延迟级（50），其被布置为调整 PM载波信号和PM时钟信号之间的相对延迟达到目标值。 极性调制器（200）还包括重新定时电路（40），其被布置成通过用PM载波信号重新定时PM时钟信号来产生幅度调制AM时钟信号; 幅度调制级（30），被配置为使用所述AM时钟信号将所述幅度调制数据时钟调制到所述幅度调制级（30）中，并且被布置成用所述振幅调制数据对所述PM载波信号进行幅度调制; 错误检测级（60），被配置为产生AM时钟信号与目标条件的第一偏差量值的指示; 以及控制级（70），其被布置为通过通过控制所述可调节延迟级（50）的所述相对延迟的调整来确定所述相对延迟的目标值，所述相对延迟的第一值使所述相对延迟的幅度最大化 第一偏差，并且将偏移应用于相对延迟的第一值。

公开(公告)号：US09240919B2

公开(公告)日：2016-01-19

申请号：US14401183

申请日：2013-06-18

Applicant: ST-Ericsson SA

Inventor： Hendrik Visser ,  Roeland Heijna

IPC: H04L27/36 ,  H03C5/00 ,  H04B14/00 ,  H04W52/02

CPC classification number: H04L27/36 ,  H03C5/00 ,  H04B14/008 ,  H04L27/361 ,  H04W52/0209 ,  Y02D70/122

Abstract: A polar modulator (200) comprises a modulation generator (10) arranged to generate phase modulation data and amplitude modulation data; and a phase modulation stage (20) arranged to generate a phase modulated, PM, carrier signal and a PM clock signal, wherein the PM carrier signal has a PM carrier signal frequency and the PM clock signal has a PM clock signal frequency, and the PM carrier signal frequency is higher than the PM clock signal frequency, the PM carrier signal and the PM clock signal are phase modulated by the phase modulation data, and the phase modulation stage (20) comprises an adjustable delay stage (50) arranged to adjust a relative delay between the PM carrier signal and the PM clock signal to a target value. The polar modulator (200) further comprises a re-timing circuit (40) arranged to generate an amplitude modulation, AM, clock signal by re-timing the PM clock signal with the PM carrier signal; an amplitude modulation stage (30) arranged to employ the AM clock signal to clock the amplitude modulation data into the amplitude modulation stage (30) and arranged to amplitude modulate the PM carrier signal with the amplitude modulation data; an error detection stage (60) arranged to generate an indication of a magnitude of a first deviation of the AM clock signal from a target condition; and a control stage (70) arranged to select the target value of the relative delay by determining, by controlling the adjustment of the relative delay by the adjustable delay stage (50), a first value of the relative delay that maximizes the magnitude of the first deviation, and applying an offset to the first value of the relative delay.

Abstract translation: 极性调制器（200）包括调制发生器（10），其被配置为产生相位调制数据和幅度调制数据; 以及相位调制级（20），被配置为产生相位调制PM载波信号和PM时钟信号，其中所述PM载波信号具有PM载波信号频率，并且所述PM时钟信号具有PM时钟信号频率，并且 PM载波信号频率高于PM时钟信号频率，PM载波信号和PM时钟信号由相位调制数据相位调制，相位调制级（20）包括可调节延迟级（50），其被布置为调整 PM载波信号和PM时钟信号之间的相对延迟达到目标值。 极性调制器（200）还包括重新定时电路（40），其被布置成通过用PM载波信号重新定时PM时钟信号来产生幅度调制AM时钟信号; 幅度调制级（30），被配置为使用所述AM时钟信号将所述幅度调制数据时钟调制到所述幅度调制级（30）中，并且被布置成用所述振幅调制数据对所述PM载波信号进行幅度调制; 错误检测级（60），被配置为产生AM时钟信号与目标条件的第一偏差量值的指示; 以及控制级（70），其被布置为通过通过控制所述可调节延迟级（50）的所述相对延迟的调整来确定所述相对延迟的目标值，所述相对延迟的第一值使所述相对延迟的幅度最大化 第一偏差，并且将偏移应用于相对延迟的第一值。