公开(公告)号：US3553497A

公开(公告)日：1971-01-05

申请号：US3553497D

申请日：1968-03-01

Applicant: STEWART WARNER CORP

Inventor： SMITH WILLIAM C

IPC: H03K3/289 ,  H03K3/12

CPC classification number: H03K3/289

Abstract: A bistable flip-flop circuit for use preferably in monolithic semiconductor integrated circuits having a master flip-flop at the circuit input and a slave output at the circuit output with coupling transistors between the two master and slave flip-flops. The emitters of the transistors coupled through a resistor to the clock pulse input so that the master flip-flop changes state responsive to the rise time of the clock pulse and the slave flip-flop changes state during the fall time of the clock pulse throughout an extended temperature range.