公开(公告)号：US20160239456A1

公开(公告)日：2016-08-18

申请号：US14625196

申请日：2015-02-18

Applicant: STMICROELECTRONICS, INC.

Inventor： Brian DENG

IPC: G06F13/42 ,  G06F1/10 ,  G06F13/362

CPC classification number: G06F13/4282 ,  G06F13/362 ,  Y02D10/14 ,  Y02D10/151

Abstract: An electronic device may include system and serial peripheral interface (SPI) clocks, and a host interface each switchable between active and inactive states, a serial controller coupled to the system clock, and a memory. A slave controller may generate a request active signal based upon a transaction request from a host and causing each of the system clock, SPI clock, and host interface into the active state, store request data in the memory, and switch the host interface to the inactive state based upon the request data being stored. The serial controller may process the request based upon the request active signal, and generate a request complete signal based upon the request being processed. The slave controller may switch the system clock to the inactive state based upon the request complete signal. The SPI clock may be switched to the inactive state based upon the request complete signal.

Abstract translation: 电子设备可以包括系统和串行外设接口（SPI）时钟，以及主机接口，每个主机接口可在主动和非活动状态之间切换，连接到系统时钟的串行控制器和存储器。 从控制器可以基于来自主机的事务请求生成请求活动信号，并使系统时钟，SPI时钟和主机接口中的每一个进入活动状态，将请求数据存储在存储器中，并将主机接口切换到 基于正在存储的请求数据的非活动状态。 串行控制器可以基于请求活动信号处理请求，并且基于正在处理的请求生成请求完成信号。 从控制器可以根据请求完成信号将系统时钟切换到无效状态。 SPI时钟可以根据请求完成信号切换到非活动状态。