公开(公告)号：US12222885B2

公开(公告)日：2025-02-11

申请号：US18133214

申请日：2023-04-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas Saux ,  Sebastien Metzger ,  Herve Cassagnes

IPC: G06F13/40 ,  G06F1/10 ,  G06F1/24

Abstract: The system on a chip includes at least a first digital domain configured to be reinitialized by a first reinitialization signal, a second digital domain and an interface circuit. The interface circuit includes a starting register in the first digital domain, a destination register in the second digital domain and a synchronization circuit in the first digital domain. The interface circuit is configured to transfer data from the starting register to the destination register upon command of a control signal transmitted by the synchronization circuit. The starting register and the synchronization circuit are configured to not be reinitialized by the first reinitialization signal.

公开(公告)号：US11550377B2

公开(公告)日：2023-01-10

申请号：US17396070

申请日：2021-08-06

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Herve Cassagnes ,  Cyril Moulin ,  Jean-Michel Gril-Maffre

IPC: H03K3/00 ,  G06F1/24 ,  H03K17/22 ,  H03K19/17736 ,  H03K3/012

Abstract: Integrated circuit, method for resetting and computer program product. The integrated circuit comprises a first portion and a second portion. The first portion comprises a reset input configured to receive a reset signal, an activation module connected to the reset input. The activation module is configured to activate the second portion upon reception of the reset signal. The first portion comprises an emissions module configured to emit a replicated reset signal. The second portion can be selectively activated or deactivated. The second portion comprises a reset input configured to receive the replicated reset signal of the emissions module, a determination module configured to determine that an elapsed time starting from the activation of the second portion of the circuit oversteps a threshold.