公开(公告)号：US12222885B2

公开(公告)日：2025-02-11

申请号：US18133214

申请日：2023-04-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas Saux ,  Sebastien Metzger ,  Herve Cassagnes

IPC: G06F13/40 ,  G06F1/10 ,  G06F1/24

Abstract: The system on a chip includes at least a first digital domain configured to be reinitialized by a first reinitialization signal, a second digital domain and an interface circuit. The interface circuit includes a starting register in the first digital domain, a destination register in the second digital domain and a synchronization circuit in the first digital domain. The interface circuit is configured to transfer data from the starting register to the destination register upon command of a control signal transmitted by the synchronization circuit. The starting register and the synchronization circuit are configured to not be reinitialized by the first reinitialization signal.

公开(公告)号：US20220156217A1

公开(公告)日：2022-05-19

申请号：US17587954

申请日：2022-01-28

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Loic Pallardy ,  Nicolas Saux

IPC: G06F13/40 ,  G06F13/362

Abstract: A system including a first port configured to simultaneously couple with a first device and a second device; and a management circuit configured to route a data signal received from a first controller to the first device in response to receiving a first-device direction from the first controller and route the data signal received from the first controller to the second device in response to receiving a second-device direction from the first controller unless an override condition for the management circuit is satisfied.