公开(公告)号：US12019510B2

公开(公告)日：2024-06-25

申请号：US17684198

申请日：2022-03-01

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Albert Martinez ,  Patrick Haddad

IPC: G06F7/58 ,  G06F11/10 ,  G06F11/26

CPC classification number: G06F11/10 ,  G06F7/58 ,  G06F11/26

Abstract: The present disclosure relates to a circuit for testing a random number generator adapted to delivering a series of random bits and comprising at least one test unit configured to detect a defect in the series of random bits, said test circuit being adapted to verifying whether, after the detection of a first defect by the test unit, the number of random bits, generated by the random number generator without the detection of a second defect by said unit test, is smaller than a first threshold.

公开(公告)号：US10089079B2

公开(公告)日：2018-10-02

申请号：US14750300

申请日：2015-06-25

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Patrick Haddad ,  Viktor Fischer

IPC: G06F7/58 ,  H03K3/84

Abstract: An integrated random signal generation circuit includes two logic gates, the output of each gate coupled to a respective first input of the other gate via assemblies of delay elements. The respective delays introduced by the assemblies of delay elements are adjustable.

公开(公告)号：US10445068B2

公开(公告)日：2019-10-15

申请号：US16132190

申请日：2018-09-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Patrick Haddad ,  Viktor Fischer

IPC: G06F7/58 ,  H03K3/84

Abstract: An integrated random signal generation circuit includes two logic gates, the output of each gate coupled to a respective first input of the other gate via assemblies of delay elements. The respective delays introduced by the assemblies of delay elements are adjustable.