Abstract:
A system and method transcodes an input video bit stream having a first encoding profile into an output video bit stream having a second encoding profile. The system includes a first module (302) and a second module (306). The system further includes a memory module (304). The first module (302) decodes the input video bit stream for generating pixel data and macroblock specifications. The second module (306) encodes the pixel data and the macroblock specifications for constructing the output video bit stream. The memory module (304) includes a first buffer module and a second buffer module. The first buffer module stores the pixel data and the second buffer module stores the macroblock specifications.
Abstract:
Video encoders and decoders and video encoding and decoding methods are provided. A video encoder includes an input buffer configured to receive a video data stream and to supply current frame data, a frame buffer configured to store reconstructed frame data, and an encoder circuit configured to read reference frame data from the frame buffer, to encode the current frame data received from the input buffer using the reference frame data and to write the reconstructed frame data to the frame buffer. The encoder circuit may be configured to write the reconstructed frame data by overwriting the reference frame data in the frame buffer.
Abstract:
An image processing arrangement includes an input to receive an indicator of a power characteristic related to an image processing arrangement and an image processor to process an image based on the indicator of the power characteristic.
Abstract:
Video encoders and decoders and video encoding and decoding methods are provided. A video encoder includes an input buffer configured to receive a video data stream and to supply current frame data, a frame buffer configured to store reconstructed frame data, and an encoder circuit configured to read reference frame data from the frame buffer, to encode the current frame data received from the input buffer using the reference frame data and to write the reconstructed frame data to the frame buffer. The encoder circuit may be configured to write the reconstructed frame data by overwriting the reference frame data in the frame buffer.
Abstract:
Video encoders and decoders and video encoding and decoding methods are provided. A video encoder includes an input buffer configured to receive a video data stream and to supply current frame data, a frame buffer configured to store reconstructed frame data, and an encoder circuit configured to read reference frame data from the frame buffer, to encode the current frame data received from the input buffer using the reference frame data and to write the reconstructed frame data to the frame buffer. The encoder circuit may be configured to write the reconstructed frame data by overwriting the reference frame data in the frame buffer.
Abstract:
Video encoders and decoders and video encoding and decoding methods are provided. A video encoder includes an input buffer configured to receive a video data stream and to supply current frame data, a frame buffer configured to store reconstructed frame data, and an encoder circuit configured to read reference frame data from the frame buffer, to encode the current frame data received from the input buffer using the reference frame data and to write the reconstructed frame data to the frame buffer. The encoder circuit may be configured to write the reconstructed frame data by overwriting the reference frame data in the frame buffer.
Abstract:
An image processing arrangement includes an input to receive an indicator of a power characteristic related to an image processing arrangement and an image processor to process an image based on the indicator of the power characteristic.
Abstract:
A system and method transcodes an input video bit stream having a first encoding profile into an output video bit stream having a second encoding profile. The system includes a first module (302) and a second module (306). The system further includes a memory module (304). The first module (302) decodes the input video bit stream for generating pixel data and macroblock specifications. The second module (306) encodes the pixel data and the macroblock specifications for constructing the output video bit stream. The memory module (304) includes a first buffer module and a second buffer module. The first buffer module stores the pixel data and the second buffer module stores the macroblock specifications.