公开(公告)号：US11749627B2

公开(公告)日：2023-09-05

申请号：US17513541

申请日：2021-10-28

Applicant: STMICROELECTRONICS LTD

Inventor： Endruw Jahja ,  Cheng-Yang Su

IPC: H01L23/00

CPC classification number: H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/02311 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/13026 ,  H01L2224/14183 ,  H01L2224/73253 ,  H01L2224/92225

Abstract: A fan-out wafer level package includes a semiconductor die with a redistribution layer on a sidewall of the semiconductor die. A redistribution layer positioned over the die includes an extended portion that extends along the sidewall. The semiconductor die is encapsulated in a molding compound layer. The molding compound layer is positioned between the extended portion of the redistribution layer and the sidewall of the semiconductor die. Solder contacts, for electrically connecting the semiconductor device to an electronic circuit board, are positioned on the redistribution layer. The solder contacts and the sidewall of the redistribution layer can provide electrical contact on two different locations. Accordingly, the package can be used to improve interconnectivity by providing vertical and horizontal connections.

公开(公告)号：US11887958B2

公开(公告)日：2024-01-30

申请号：US17403752

申请日：2021-08-16

Applicant: STMICROELECTRONICS LTD

Inventor： Cheng-Yang Su

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L24/11 ,  H01L2224/11462 ,  H01L2224/1403 ,  H01L2224/1405

Abstract: A die including a first contact with a first shape (e.g., ring-shaped) and a second contact with a second shape (e.g., cylindrical shaped) different from the first shape. The first contact has an opening that extends through a central region of a surface of the first contact. A first solder portion is coupled to the surface of the first contact and the first solder portion has the first shape. A second solder portion is coupled to a surface of the second contact and the second solder portion has the second shape. The first solder portion and the second solder portion both have respective points furthest away from a substrate of the die. These respective points of the first solder portion and the second solder portion are co-planar with each other such that a standoff height of the die remains consistent when coupled to a PCB or an electronic component.

公开(公告)号：US11195809B2

公开(公告)日：2021-12-07

申请号：US16706594

申请日：2019-12-06

Applicant: STMICROELECTRONICS LTD

Inventor： Endruw Jahja ,  Cheng-Yang Su

IPC: H01L23/00

Abstract: A fan-out wafer level package includes a semiconductor die with a redistribution layer on a sidewall of the semiconductor die. A redistribution layer positioned over the die includes an extended portion that extends along the sidewall. The semiconductor die is encapsulated in a molding compound layer. The molding compound layer is positioned between the extended portion of the redistribution layer and the sidewall of the semiconductor die. Solder contacts, for electrically connecting the semiconductor device to an electronic circuit board, are positioned on the redistribution layer. The solder contacts and the sidewall of the redistribution layer can provide electrical contact on two different locations. Accordingly, the package can be used to improve interconnectivity by providing vertical and horizontal connections.