公开(公告)号：US11742437B2

公开(公告)日：2023-08-29

申请号：US17187510

申请日：2021-02-26

Applicant: STMICROELECTRONICS LTD ,  STMICROELECTRONICS PTE LTD

Inventor： David Gani ,  Yiying Kuo

IPC: H01L31/0203 ,  H01L31/18 ,  H01L31/0392 ,  H01L31/02 ,  H01L21/78

CPC classification number: H01L31/0203 ,  H01L21/78 ,  H01L31/02002 ,  H01L31/02005 ,  H01L31/0392 ,  H01L31/1876 ,  H01L31/1896

Abstract: The present disclosure is directed to a package, such as a wafer level chip scale package (WLCSP), with a die coupled to a central portion of a transparent substrate. The transparent substrate includes a central portion having and a peripheral portion surrounding the central portion. The package includes a conductive layer coupled to a contact of the die within the package that extends from the transparent substrate to an active surface of the package. The active surface is utilized to mount the package within an electronic device or to a printed circuit board (PCB) accordingly. The package includes a first insulating layer separating the die from the conductive layer, and a second insulating layer on the conductive layer.