公开(公告)号：US20040239368A1

公开(公告)日：2004-12-02

申请号：US10768962

申请日：2004-01-30

Applicant: STMICROELECTRONICS PVT. LTD.

Inventor： Vivek Nautiyal ,  Ashish Kumar

IPC: H03K019/094

CPC classification number: G11C5/063 ,  H03K19/0019

Abstract: A method and system for reducing power consumption in digital circuits using charge redistribution, comprising a plurality of signal lines, an intermediate floating virtual source/sink, and a charge redistribution circuit connected to each said signal line that isolates said line from its source and connects it to the intermediate floating virtual source/sink during an idle period prior to a change of state. This charge redistribution provides steady state statistical independent advantage due to charge recycling without inserting extra complimentary line.

Abstract translation: 一种使用电荷重新分配来减少数字电路中的功耗的方法和系统，包括多条信号线，中间浮动虚拟源/宿和连接到每条所述信号线的电荷再分配电路，所述信号线将所述线与源极隔离并连接 它在状态改变之前的空闲时段期间到中间浮动虚拟源/汇。 该充电重新分配由于充电回收而不插入额外的互补线路，提供稳定的统计独立优势。