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公开(公告)号:US20140104666A1
公开(公告)日:2014-04-17
申请号:US14043547
申请日:2013-10-01
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Gabriele MINOIA , Salvatore Galeone , Enrico Stefano Temporiti Milani
IPC: G02F1/01
CPC classification number: G02F1/0121 , G02F1/225 , G02F2201/126 , H03K19/018521 , H03K19/018528
Abstract: A relatively high-speed, high-efficiency CMOS two branch driver core that may operate under relatively low supply voltage may include thin oxide CMOS transistors configured to generate rail-to-rail output swings larger than twice a supply voltage and without exceeding safe operating area limits. Each of the two branches may include two stacked CMOS inverter pairs configured to drive a respective load capacitance coupled between respective CMOS inverter outputs, in phase opposition to the other branch. A pre-driver circuit input with a differential modulating signal may output two synchronous differential voltage drive signals of a swing of half of the supply voltage and DC-shifted by half of the supply voltage with respect to each other and that may be applied to the respective CMOS inverter inputs of the two branches.
Abstract translation: 可以在相对低的电源电压下工作的相对高速,高效率的CMOS两分支驱动器核心可以包括薄氧化物CMOS晶体管,其被配置为产生大于电源电压两倍的轨至轨输出摆幅,并且不超过安全操作区域 限制 两个分支中的每一个可以包括两个堆叠的CMOS反相器对,其被配置为驱动耦合在各个CMOS反相器输出之间的相应负载电容,与另一个分支相反。 具有差分调制信号的预驱动器电路输入可以输出两个同步差分电压驱动信号,该两个同步差分电压驱动信号是电源电压的一半的摆幅,并相对于彼此直流偏移电源电压的一半,并且可以施加到 相应的CMOS反相器输入的两个分支。
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公开(公告)号:US09229250B2
公开(公告)日:2016-01-05
申请号:US14043547
申请日:2013-10-01
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Gabriele Minoia , Salvatore Galeone , Enrico Stefano Temporiti Milani
IPC: H03K19/0175 , G02F1/01 , H03K19/0185 , G02F1/225
CPC classification number: G02F1/0121 , G02F1/225 , G02F2201/126 , H03K19/018521 , H03K19/018528
Abstract: A relatively high-speed, high-efficiency CMOS two branch driver core that may operate under relatively low supply voltage may include thin oxide CMOS transistors configured to generate rail-to-rail output swings larger than twice a supply voltage and without exceeding safe operating area limits. Each of the two branches may include two stacked CMOS inverter pairs configured to drive a respective load capacitance coupled between respective CMOS inverter outputs, in phase opposition to the other branch. A pre-driver circuit input with a differential modulating signal may output two synchronous differential voltage drive signals of a swing of half of the supply voltage and DC-shifted by half of the supply voltage with respect to each other and that may be applied to the respective CMOS inverter inputs of the two branches.
Abstract translation: 可以在相对低的电源电压下工作的相对高速,高效率的CMOS两分支驱动器核心可以包括薄氧化物CMOS晶体管,其被配置为产生大于电源电压两倍的轨至轨输出摆幅,并且不超过安全操作区域 限制 两个分支中的每一个可以包括两个堆叠的CMOS反相器对,其被配置为驱动耦合在各个CMOS反相器输出之间的相应负载电容,与另一个分支相反。 具有差分调制信号的预驱动器电路输入可以输出两个同步差分电压驱动信号,该两个同步差分电压驱动信号是电源电压的一半的摆幅,并相对于彼此直流偏移电源电压的一半,并且可以施加到 相应的CMOS反相器输入的两个分支。
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