公开(公告)号：US20030048562A1

公开(公告)日：2003-03-13

申请号：US09993778

申请日：2001-11-05

Applicant: STMicroelectronics, Inc.

Inventor： Fereidoon Heydari ,  Hakan Ozdemir ,  Sadik O. Arf

IPC: G11B005/09 ,  G11B005/596

CPC classification number: G11B5/59633

Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., null rate and {fraction (4/12)} rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery. The spin-up search circuit may include a robust multistage search circuit that detects a preamble and/or a DC field to search for an initial servo sector with a low error rate during spin up. In one example, the servo system samples each dibit 4 times throughout the entire servo sector uses PR4 equalization. The relatively low number of samples required for the system allows the servo format density to be near the channel bandwidth while increasing the SNR performance.

Abstract translation: 为高轨道/英寸磁盘驱动器系统提供了新的同步部分响应最大似然（PRML）伺服。 为了增加硬盘驱动器（HDD）的数据容量，可以缩短伺服格式和/或增加磁道密度。 新的伺服系统具有允许高性能和准确的系统定位读写头的电路。 主要电路包括突发解调，维特比检测，定时同步和自旋搜索。 高线性离散傅立叶变换（DFT）突发解调电路可以解调高密度和低信噪比（SNR）位置脉冲串。 维特比检测电路包括与至少两组格雷码（例如，1/4速率和4/12速率）匹配的同步标记检测器和维特比检测器，并相应地修剪。 定时同步电路包括实现全数字定时恢复的相位重启和内插定时恢复（ITR）电路。 上行搜索电路可以包括鲁棒的多级搜索电路，其检测前导码和/或DC场，以在旋转期间以低错误率搜索初始伺服扇区。 在一个示例中，伺服系统在整个伺服扇区中采样4次4位，使用PR4均衡。 系统所需的相对较少的样本数量允许伺服格式密度靠近信道带宽，同时增加SNR性能。