公开(公告)号：US20030026016A1

公开(公告)日：2003-02-06

申请号：US09993986

申请日：2001-11-05

Applicant: STMicroelectronics, Inc.

Inventor： Fereidoon Heydari ,  Hakan Ozdemir

IPC: G11B020/06 ,  G11B005/596

CPC classification number: G11B5/59655 ,  G11B5/59688

Abstract: A new technique for Hard Disk Drive (HDD) servo-burst demodulation is provided. A 4-samples per dibit Discrete Fourier Transform (DFT) amplitude estimation is used to calculate the read-head servo-position error signal. Comparatively, the conventional method of burst demodulationnullcalled burst integrationnulltypically uses more than 8 samples/dibit. Consequently, the new 4-samples/dibit DFT burst-demodulation scheme requires fewer samples per dibit than does burst integration, thus reducing the disk space occupied by the burst data while increasing the performance as compared to burst integration. Furthermore, the DFT scheme does not require the samples to be synchronized to any particular points of the servo burst, and can include an averaging algorithm that further improves performance for a given Signal to Noise Ratio (SNR). Moreover, the same sample-clocking circuit that detects the Gray Code servo information can also implement the DFT burst-demodulation scheme to demodulate the servo burst.

Abstract translation: 提供了一种用于硬盘驱动器（HDD）伺服突发解调的新技术。 使用4个样本每二进制离散傅里叶变换（DFT）幅度估计来计算读取头伺服位置误差信号。 相比之下，传统的突发解调方法 - 称为突发集成 - 通常使用多于8个采样/双位。 因此，新的4采样/双位DFT突发解调方案比突发集成需要比每比特少的采样，因此与突发集成相比，降低了突发数据占用的磁盘空间，同时提高了性能。 此外，DFT方案不要求样本与伺服脉冲串的任何特定点同步，并且可以包括进一步改善给定信噪比（SNR）的性能的平均算法。 此外，检测格雷码伺服信息的相同采样时钟电路还可以实现DFT突发解调方案来解调伺服脉冲串。

公开(公告)号：US20030011918A1

公开(公告)日：2003-01-16

申请号：US09994009

申请日：2001-11-05

Applicant: STMicroelectronics, Inc.

Inventor： Fereidoon Heydari ,  Hakan Ozdemir

IPC: G11B005/09 ,  G11B005/596

CPC classification number: G11B20/10009 ,  G11B5/59633 ,  G11B20/10055 ,  G11B20/10074 ,  G11B20/10296 ,  G11B20/1217 ,  G11B20/1496 ,  G11B27/3027 ,  G11B2020/1484 ,  G11B2220/2516 ,  H03M7/16

Abstract: A new technique incorporates a 1/4-rate Hard Disk Drive (HDD) servo-data encoding into a Partial Response Maximum Likelihood (PRML) read channel. The limitation of the HDD servo-track writer is the maximum frequency associated with writing the servo data while maintaining a level of data alignment between the data in the adjacent tracks (coherency). The 1/4 code allows the servo data to be written at the maximum coherency bandwidth. Specifically, the data is read back (or sampled) at twice the write frequency. This increases the data redundancy while also increasing the data density and the disk storage capacity. The 1/4 coding can also be applied to conventional HDD dibit coding. Specifically, the 1/4-coding scheme reads each dibit-coded servo-data transition 01 as 0011, and reads each non-transition 00 (or 0) as 0000. The 1/4 coding and its matched Viterbi detector can also increase the data detection in comparison to conventional peak-detection schemes. And although the 1/4 coding scheme is described in conjunction with a PR4-type servo channel, it can also be used with an EPR4-type servo channel and other types of servo channels.

Abstract translation: 一种新技术将1/4速度硬盘驱动器（HDD）伺服数据编码结合到部分响应最大似然（PRML）读通道中。 HDD伺服磁道写入器的限制是与伺服数据写入相关联的最大频率，同时保持相邻轨道中的数据之间的数据对齐水平（相干性）。 1/4代码允许伺服数据以最大相干带宽写入。 具体来说，以写入频率的两倍读取（或采样）数据。 这增加了数据冗余，同时也增加了数据密度和磁盘存储容量。 1/4编码也可以应用于传统的HDD双编码。 具体地说，1/4编码方式将每个二进制编码的伺服数据转换01读取为0011，并将每个非转换00（或0）读取为0000。1/4编码及其匹配的维特比检测器也可以增加 数据检测与传统的峰值检测方案相比。 虽然1/4编码方案与PR4型伺服通道一起描述，但也可以与EPR4型伺服通道和其他类型的伺服通道一起使用。

公开(公告)号：US20030048562A1

公开(公告)日：2003-03-13

申请号：US09993778

申请日：2001-11-05

Applicant: STMicroelectronics, Inc.

Inventor： Fereidoon Heydari ,  Hakan Ozdemir ,  Sadik O. Arf

IPC: G11B005/09 ,  G11B005/596

CPC classification number: G11B5/59633

Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., null rate and {fraction (4/12)} rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery. The spin-up search circuit may include a robust multistage search circuit that detects a preamble and/or a DC field to search for an initial servo sector with a low error rate during spin up. In one example, the servo system samples each dibit 4 times throughout the entire servo sector uses PR4 equalization. The relatively low number of samples required for the system allows the servo format density to be near the channel bandwidth while increasing the SNR performance.

Abstract translation: 为高轨道/英寸磁盘驱动器系统提供了新的同步部分响应最大似然（PRML）伺服。 为了增加硬盘驱动器（HDD）的数据容量，可以缩短伺服格式和/或增加磁道密度。 新的伺服系统具有允许高性能和准确的系统定位读写头的电路。 主要电路包括突发解调，维特比检测，定时同步和自旋搜索。 高线性离散傅立叶变换（DFT）突发解调电路可以解调高密度和低信噪比（SNR）位置脉冲串。 维特比检测电路包括与至少两组格雷码（例如，1/4速率和4/12速率）匹配的同步标记检测器和维特比检测器，并相应地修剪。 定时同步电路包括实现全数字定时恢复的相位重启和内插定时恢复（ITR）电路。 上行搜索电路可以包括鲁棒的多级搜索电路，其检测前导码和/或DC场，以在旋转期间以低错误率搜索初始伺服扇区。 在一个示例中，伺服系统在整个伺服扇区中采样4次4位，使用PR4均衡。 系统所需的相对较少的样本数量允许伺服格式密度靠近信道带宽，同时增加SNR性能。