公开(公告)号：US20150262776A1

公开(公告)日：2015-09-17

申请号：US14657991

申请日：2015-03-13

Applicant: STMicroelectronics (Alps) SAS

Inventor： Vratislav MICHAL ,  Denis COTTIN

IPC: H01H47/00

CPC classification number: H01H47/00 ,  H03K17/167 ,  H03K17/30 ,  H03K2017/307 ,  Y10T307/76

Abstract: A circuit including: a plurality of first switches connected in parallel between a first terminal and a second terminal; and a control circuit capable of implementing the following steps at each period of a clock signal: comparing the voltage between the first and second terminals with a reference voltage; if the voltage between the first and second terminals is greater than the reference voltage, turning on one of the first switches without modifying the state of the other switches; and if the voltage between the first and second terminals is smaller than the reference voltage, turning off one of the first switches without modifying the state of the other switches.

Abstract translation: 一种电路，包括：在第一端子和第二端子之间并联连接的多个第一开关; 以及控制电路，其能够在时钟信号的每个周期执行以下步骤：将所述第一和第二端子之间的电压与参考电压进行比较; 如果第一和第二端子之间的电压大于参考电压，则在不改变其它开关的状态的情况下，接通第一开关中的一个开关; 并且如果第一和第二端子之间的电压小于参考电压，则在不修改其他开关的状态的情况下关闭其中一个开关。