公开(公告)号：US20210296129A1

公开(公告)日：2021-09-23

申请号：US17338379

申请日：2021-06-03

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Denis Monnier ,  Olivier Gonnard

IPC: H01L21/28 ,  H01L21/8234 ,  H01L21/285

Abstract: A exemplary semiconductor device includes a first gate structure overlying a surface of the semiconductor body, the first gate structure being silicided. A second gate structure overlies the surface of the semiconductor body and not being silicided. An oxide layer overlies the second gate structure and extends toward the first gate structure. A silicon nitride region is laterally spaced from the second gate structure and overlies a portion of the oxide layer between the first gate structure and the second gate structure.

公开(公告)号：US11869772B2

公开(公告)日：2024-01-09

申请号：US17338379

申请日：2021-06-03

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Denis Monnier ,  Olivier Gonnard

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/8234 ,  H01L21/285

CPC classification number: H01L21/28052 ,  H01L21/2855 ,  H01L21/28079 ,  H01L21/823443

Abstract: A exemplary semiconductor device includes a first gate structure overlying a surface of the semiconductor body, the first gate structure being silicided. A second gate structure overlies the surface of the semiconductor body and not being silicided. An oxide layer overlies the second gate structure and extends toward the first gate structure. A silicon nitride region is laterally spaced from the second gate structure and overlies a portion of the oxide layer between the first gate structure and the second gate structure.

公开(公告)号：US11056342B2

公开(公告)日：2021-07-06

申请号：US16515805

申请日：2019-07-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Denis Monnier ,  Olivier Gonnard

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/8234 ,  H01L21/285

Abstract: A method of fabricating a semiconductor device includes forming a protective layer on a portion of the semiconductor body that is not to be silicided. The protective layer includes a silicon oxide layer and a silicon nitride layer over the silicon oxide layer. At least a portion of the silicon nitride layer of the protective layer is removed. A silicided portion of the semiconductor body is laterally spaced from the protective layer. The siliciding is performed by an ion sputtering in a plasma environment on both the silicided portion of the semiconductor body and the portion of the semiconductor body that is not to be silicided.

公开(公告)号：US20200043737A1

公开(公告)日：2020-02-06

申请号：US16515805

申请日：2019-07-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Denis Monnier ,  Olivier Gonnard

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/8234

Abstract: A method of fabricating a semiconductor device includes forming a protective layer on a portion of the semiconductor body that is not to be silicided. The protective layer includes a silicon oxide layer and a silicon nitride layer over the silicon oxide layer. At least a portion of the silicon nitride layer of the protective layer is removed. A silicided portion of the semiconductor body is laterally spaced from the protective layer. The siliciding is performed by an ion sputtering in a plasma environment on both the silicided portion of the semiconductor body and the portion of the semiconductor body that is not to be silicided.