公开(公告)号：US20230290570A1

公开(公告)日：2023-09-14

申请号：US18176190

申请日：2023-02-28

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Marios BARLAS ,  Yannick LE FRIEC ,  Xavier FEDERSPIEL

IPC: H01G4/008 ,  H01G4/33 ,  H01G4/30 ,  H01G4/012 ,  H01G4/228

CPC classification number: H01G4/008 ,  H01G4/012 ,  H01G4/228 ,  H01G4/306 ,  H01G4/33

Abstract: A device includes a first layer, having a copper track located therein. The first layer is covered with a second layer including a cavity. The cavity exposes at least a portion of the track. The portion is covered with a third layer of titanium nitride doped with silicon.