公开(公告)号：US10771048B2

公开(公告)日：2020-09-08

申请号：US16747341

申请日：2020-01-20

申请人： STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

发明人： Capucine Lecat-Mathieu De Boissac ,  Fady Abouzeid ,  Gilles Gasiot ,  Philippe Roche ,  Victor Malherbe

IPC分类号： H03K5/14 ,  H03K5/135 ,  H03K5/00

摘要： A first circuit includes a first chain of identical stages defining first and second delay lines. A second circuit includes a second chain of identical stages defining third and fourth delay lines. The stages of the second chain are identical to the stages of the first chain. A third circuit selectively couples one of the third delay line, the fourth delay line, or a first input of the third circuit to an input of the first circuit.