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公开(公告)号：US20200220462A1
公开(公告)日：2020-07-09
申请号：US16819721
申请日：2020-03-16
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard
Abstract: A method includes switching a switching circuit of the switched-mode power supply in a synchronous mode by turning on and off switches of the switching circuit in synchrony with a clock signal, wherein the switching circuit is coupled to an inductive element, and wherein the synchronous mode comprises a charging phase and a discharging phase; switching the switching circuit in an asynchronous mode by turning on and off switches of the switching circuit without being synchronized with the clock signal, wherein the asynchronous mode comprises a charging phase and a discharging phase; charging the inductive element during the charging phase of the synchronous mode; discharging the inductive element during the discharging phase of the synchronous mode; charging the inductive element during the charging phase of the asynchronous mode; and discharging the inductive element during the discharging phase of the asynchronous mode.
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公开(公告)号：US11011983B2
公开(公告)日：2021-05-18
申请号：US16570660
申请日：2019-09-13
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard , Helene Esch
Abstract: A method can be used for regulating a pulse-width modulation signal that is driving a voltage-buck switched-mode voltage regulator. The method includes comparing an input voltage of the switched-mode voltage regulator with a threshold voltage. The frequency of the pulse-width modulation signal is decreased when the input voltage is lower than the threshold voltage. The frequency is not decreased when the input voltage is not lower than the threshold voltage.
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公开(公告)号：US20190190381A1
公开(公告)日：2019-06-20
申请号：US16222366
申请日：2018-12-17
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard
CPC classification number: H02M3/158 , H02M1/08 , H02M3/155 , H02M2003/1555
Abstract: A method includes switching a switching circuit of the switched-mode power supply in a synchronous mode by turning on and off switches of the switching circuit in synchrony with a clock signal, wherein the switching circuit is coupled to an inductive element, and wherein the synchronous mode comprises a charging phase and a discharging phase; switching the switching circuit in an asynchronous mode by turning on and off switches of the switching circuit without being synchronized with the clock signal, wherein the asynchronous mode comprises a charging phase and a discharging phase; charging the inductive element during the charging phase of the synchronous mode; discharging the inductive element during the discharging phase of the synchronous mode; charging the inductive element during the charging phase of the asynchronous mode; and discharging the inductive element during the discharging phase of the asynchronous mode.
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Patent Agency Ranking
公开(公告)号：US11575306B2
公开(公告)日：2023-02-07
申请号：US17242955
申请日：2021-04-28
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard , Helene Esch
Abstract: A method for increasing performance of a voltage-buck switched-mode voltage regulator includes generating a first pulse-width modulation signal based on a clock signal, decreasing a frequency of the clock signal to form a modified clock signal, passing the modified clock signal to a digital modulation circuit as a regulated clock signal; and generating a second pulse-width modulation signal based on the regulated clock signal using the digital modulation circuit. The first pulse-width modulation signal includes a period T1 and an off duration D2 corresponding to a first duty cycle. The off duration D2 is an intrinsic pulse-width modulation signal generation latency. The second pulse-width modulation signal includes a period T2 and the off duration D2. The decreased frequency of the modified clock signal causes T2 to be greater than T1 such that a second duty cycle of the second pulse-width modulation signal is increased relative to the first duty cycle.
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公开(公告)号：US11171565B2
公开(公告)日：2021-11-09
申请号：US16584147
申请日：2019-09-26
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Helene Esch , Francois Amiard
Abstract: In an embodiment, A device includes an operational amplifier and a feedback loop. The feedback loop is coupled between a first input of the operational amplifier and an output of the operational amplifier. The feedback loop is controllable according to a saturation of the operational amplifier. In one example, the device is incorporated in a microcontroller.
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公开(公告)号：US20210249954A1
公开(公告)日：2021-08-12
申请号：US17242955
申请日：2021-04-28
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard , Helene Esch
Abstract: A method for increasing performance of a voltage-buck switched-mode voltage regulator includes generating a first pulse-width modulation signal based on a clock signal, decreasing a frequency of the clock signal to form a modified clock signal, passing the modified clock signal to a digital modulation circuit as a regulated clock signal; and generating a second pulse-width modulation signal based on the regulated clock signal using the digital modulation circuit. The first pulse-width modulation signal includes a period T1 and an off duration D2 corresponding to a first duty cycle. The off duration D2 is an intrinsic pulse-width modulation signal generation latency. The second pulse-width modulation signal includes a period T2 and the off duration D2. The decreased frequency of the modified clock signal causes T2 to be greater than T1 such that a second duty cycle of the second pulse-width modulation signal is increased relative to the first duty cycle.
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公开(公告)号：US10992228B2
公开(公告)日：2021-04-27
申请号：US16819721
申请日：2020-03-16
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard
Abstract: A method includes switching a switching circuit of the switched-mode power supply in a synchronous mode by turning on and off switches of the switching circuit in synchrony with a clock signal, wherein the switching circuit is coupled to an inductive element, and wherein the synchronous mode comprises a charging phase and a discharging phase; switching the switching circuit in an asynchronous mode by turning on and off switches of the switching circuit without being synchronized with the clock signal, wherein the asynchronous mode comprises a charging phase and a discharging phase; charging the inductive element during the charging phase of the synchronous mode; discharging the inductive element during the discharging phase of the synchronous mode; charging the inductive element during the charging phase of the asynchronous mode; and discharging the inductive element during the discharging phase of the asynchronous mode.
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公开(公告)号：US20200099296A1
公开(公告)日：2020-03-26
申请号：US16570660
申请日：2019-09-13
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Chesneau , Francois Amiard , Helene Esch
Abstract: A method can be used for regulating a pulse-width modulation signal that is driving a voltage-buck switched-mode voltage regulator. The method includes comparing an input voltage of the switched-mode voltage regulator with a threshold voltage. The frequency of the pulse-width modulation signal is decreased when the input voltage is lower than the threshold voltage. The frequency is not decreased when the input voltage is not lower than the threshold voltage.
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