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公开(公告)号：US11967900B2
公开(公告)日：2024-04-23
申请号：US17366353
申请日：2021-07-02
发明人： Sebastien Ortet , Olivier Lauzier
CPC分类号： H02M3/158 , H02M1/0032 , H02M1/0083 , H02M1/36
摘要： An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.
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公开(公告)号：US20220038001A1
公开(公告)日：2022-02-03
申请号：US17366353
申请日：2021-07-02
发明人： Sebastien Ortet , Olivier Lauzier
摘要： An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.
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