公开(公告)号：US20230074505A1

公开(公告)日：2023-03-09

申请号：US17903214

申请日：2022-09-06

Applicant: STMicroelectronics (Tours) SAS

Inventor： Yannick HAGUE ,  Romain LAUNOIS

IPC: H02M7/162 ,  H02M7/219 ,  H02M1/08

Abstract: A converter includes first and second transistors coupled between first and second nodes, and first and second thyristors coupled between the first and second nodes. The converter is controlled for operation to: in first periods, turn the first transistor and second thyristor on and turn the second transistor and the first thyristor off, and in second periods, turn the first transistor and the second thyristor off and turn the second transistor and the first thyristor on. Further control of converter operation includes, for a third period following each first period, turning the first and second transistors off, turning the second thyristor off, and injecting a current into the gate of the first thyristor. Additional control of converter operation includes, for a fourth period following each second period, turning the first and second transistors off, turning the first thyristor off, and injecting a current into the gate of the second thyristor.

公开(公告)号：US20220393608A1

公开(公告)日：2022-12-08

申请号：US17888686

申请日：2022-08-16

Applicant: STMicroelectronics (Tours) SAS

Inventor： Yannick HAGUE ,  Romain LAUNOIS

IPC: H02M7/162 ,  H02M1/00

Abstract: A circuit includes two input nodes and two output nodes. A rectifier bridge is coupled to the input and output nodes. The rectifier bridge includes a first and second thyristors and a third thyristor coupled in series with a resistor in series. The series coupled third thyristor and resistor are coupled in parallel with one of the first and second thyristors. The first and second thyristors are controlled off, with the third thyristor controlled on, during start up with resistor functioning as an in in-rush current limiter circuit. In normal rectifying operation mode, the first and second thyristors are controlled on, with the third thyristor controlled off.

公开(公告)号：US20210135590A1

公开(公告)日：2021-05-06

申请号：US17071193

申请日：2020-10-15

Applicant: STMicroelectronics (Tours) SAS

Inventor： Yannick HAGUE ,  Romain LAUNOIS

IPC: H02M7/162

Abstract: A circuit includes two input nodes and two output nodes. A rectifier bridge is coupled to the input and output nodes. The rectifier bridge includes a first and second thyristors and a third thyristor coupled in series with a resistor in series. The series coupled third thyristor and resistor are coupled in parallel with one of the first and second thyristors. The first and second thyristors are controlled off, with the third thyristor controlled on, during start up with resistor functioning as an in in-rush current limiter circuit. In normal rectifying operation mode, the first and second thyristors are controlled on, with the third thyristor controlled off.

公开(公告)号：US20220200472A1

公开(公告)日：2022-06-23

申请号：US17550534

申请日：2021-12-14

Applicant: STMicroelectronics (Tours) SAS

Inventor： Yannick HAGUE ,  Benoit RENARD ,  Romain LAUNOIS

IPC: H02M7/162 ,  H02M1/36 ,  H02M1/32

Abstract: A voltage converter includes a circuit formed by a parallel association, connected between first and second nodes, of a first branch and a second branch. The first branch includes a first controlled rectifying element having a first impedance. The second branch includes a resistor associated in series with a second rectifying element having a second impedance substantially equal to the first impedance. The second rectifying element may, for example, be a triac having its gate coupled to receive a signal from an intermediate node in the series association of the second branch. Alternatively, the second rectifying element may be a thyristor having its gate coupled to receive a signal at the anode of the thyristor.

公开(公告)号：US20220166340A1

公开(公告)日：2022-05-26

申请号：US17532717

申请日：2021-11-22

Applicant: STMicroelectronics (Tours) SAS

Inventor： Yannick HAGUE ,  Romain LAUNOIS

IPC: H02M7/155 ,  H02M1/36 ,  H02M7/219

Abstract: A voltage converter delivers an output voltage between a first and a second node. The voltage converter includes a capacitor series-coupled with a resistor between the first and second nodes. The resistor is coupled in parallel with a bidirectional switch receiving at its control terminal a positive bias voltage referenced to the second node.