METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE

    公开(公告)号:US20250015038A1

    公开(公告)日:2025-01-09

    申请号:US18757887

    申请日:2024-06-28

    Abstract: A semiconductor die is mounted on a substrate having electrically conductive substrate portions. The electrically conductive substrate portions include a die mounting location and electrically conductive leads around the die mounting location. The semiconductor die is mounted on a first surface of the die mounting location. The substrate and the semiconductor die are encapsulated in an electrically insulating encapsulation having a surface opposite the first surface. An electrically conductive path is provided to electrically couple the semiconductor die to one of the electrically conductive substrate portions. The electrically conductive path includes: a first path section extending through and/or over the electrically insulating encapsulation between the electrically conductive substrate portion and an intermediate point at the surface of the electrically insulating encapsulation, and a second path section provided via wire bonding and extending between the semiconductor die and the intermediate point at the surface of the electrically insulating encapsulation.

    SEMICONDUCTOR DEVICE, CORRESPONDING MANUFACTURING METHOD AND SUBSTRATE FOR USE THEREIN

    公开(公告)号:US20240332106A1

    公开(公告)日:2024-10-03

    申请号:US18614989

    申请日:2024-03-25

    CPC classification number: H01L23/3142 H01L21/56 H01L23/49503

    Abstract: A semiconductor die is arranged at a first surface of a die pad. The die pad has a peripheral edge and a second surface opposite to the first surface that includes a first region and a second region surrounding the first region. The second region extends to the peripheral edge of the die pad from a border line at the first region and includes a recessed formation extending continuously along the border line. An insulating encapsulation is molded onto the die pad with the first region of the second surface left uncovered and the second region of the second surface of the die pad being covered by the insulating encapsulation that fills the recessed formation. The recessed formation has a variable recess depth between the border line and the peripheral edge of the die pad to provide an extended length delamination path from the border line to the semiconductor die.

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