公开(公告)号：US20240405098A1

公开(公告)日：2024-12-05

申请号：US18623604

申请日：2024-04-01

Applicant: STMicroelectronics International N.V.

Inventor： Maurizio Gabriele CASTORINA ,  Voon Cheng NGWAN

IPC: H01L29/66 ,  H01L21/265 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78

Abstract: An integrated circuit transistor device includes a semiconductor substrate providing a drain, a first doped region in the semiconductor substrate providing a source and a second doped region buried in the semiconductor substrate providing a body. A trench extends into the semiconductor substrate and passes through the first and second doped regions. An insulated polygate region within the trench surrounds a polyoxide region. The polygate region is formed by a first gate lobe and second gate lobe on opposite sides of the polyoxide region and a gate bridge over the polyoxide region. At a first region the gate bridge has a first thickness, and at a second region the gate bridge has a second thickness (greater than the first thickness). At the second region, a gate contact is provided at each trench to extend partially into the second thickness of the gate bridge.