公开(公告)号：US09397622B2

公开(公告)日：2016-07-19

申请号：US14530055

申请日：2014-10-31

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Sameer Vashishtha ,  Saiyid Mohammad Irshad Rizvi

IPC: H03F3/45 ,  H03K5/24

CPC classification number: H03F3/45179 ,  H03F2200/129 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03K5/2481

Abstract: In one embodiment, a circuit includes a differential amplifier having a differential pair with a first transistor and second transistor. Each of the first and the second transistors include a front gate contact and a back gate contact. A first digital feedback loop is coupled between an output of the differential amplifier to the back gate contact of the first transistor. A second digital feedback loop is coupled to the back gate contact of the second transistor. The first digital feedback loop is configured to be opposite in phase to the second digital feedback loop.

Abstract translation: 在一个实施例中，电路包括具有与第一晶体管和第二晶体管的差分对的差分放大器。 第一和第二晶体管中的每一个包括前门接触和后门接触。 第一数字反馈回路耦合在差分放大器的输出端与第一晶体管的后栅极接触之间。 第二数字反馈环耦合到第二晶体管的背栅极接触。 第一数字反馈回路被配置为与第二数字反馈回路相位相反。

公开(公告)号：US20160126909A1

公开(公告)日：2016-05-05

申请号：US14530055

申请日：2014-10-31

Applicant: STMICROELECTRONICS PVT. LTD.

Inventor： Sameer Vashishtha ,  Saiyid Mohammad Irshad Rizvi

IPC: H03F3/45 ,  H03K5/24

CPC classification number: H03F3/45179 ,  H03F2200/129 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03K5/2481

Abstract: In one embodiment, a circuit includes a differential amplifier having a differential pair with a first transistor and second transistor. Each of the first and the second transistors include a front gate contact and a back gate contact. A first digital feedback loop is coupled between an output of the differential amplifier to the back gate contact of the first transistor. A second digital feedback loop is coupled to the back gate contact of the second transistor. The first digital feedback loop is configured to be opposite in phase to the second digital feedback loop.

Abstract translation: 在一个实施例中，电路包括具有与第一晶体管和第二晶体管的差分对的差分放大器。 第一和第二晶体管中的每一个包括前门接触和后门接触。 第一数字反馈回路耦合在差分放大器的输出端与第一晶体管的后栅极接触之间。 第二数字反馈环耦合到第二晶体管的背栅极接触。 第一数字反馈回路被配置为与第二数字反馈回路相位相反。