公开(公告)号：US20040015758A1

公开(公告)日：2004-01-22

申请号：US10436895

申请日：2003-05-13

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Shalini Pathak ,  Parvesh Swami

IPC: G01R031/28

CPC classification number: G11C29/025 ,  G01R31/318516 ,  G11C29/02 ,  G11C29/12

Abstract: A programmable logic device (PLD) has the ability to test the configuration memory either independently or during configuration. The PLD may include a selector for selecting a particular column or row of the configuration memory array, and an input data storage device for storing configuration data required to be stored in the selected column or row, or test data for testing the selected column or row. The PLD may also include an output data storage device for storing the output from the selected column or row, and test logic that provides control signals for verifying the correct operation of the data lines of the configuration memory array without disturbing the data stored in the memory array.

Abstract translation: 可编程逻辑器件（PLD）能够独立地或在配置期间测试配置存储器。 PLD可以包括用于选择配置存储器阵列的特定列或行的选择器，以及用于存储需要存储在所选列或行中的配置数据的输入数据存储装置，或用于测试所选列或行的测试数据 。 PLD还可以包括用于存储来自所选择的列或行的输出的输出数据存储装置以及提供用于验证配置存储器阵列的数据线的正确操作的控制信号而不干扰存储在存储器中的数据的测试逻辑 数组。