公开(公告)号：US20030129812A1

公开(公告)日：2003-07-10

申请号：US10346444

申请日：2003-01-17

Applicant: STMicroelectronics S.A.

Inventor： Gerard Auriel ,  Laurent Cornibert

IPC: H01L021/22

CPC classification number: H01L29/74 ,  H01L21/2257 ,  H01L21/761 ,  H01L21/763 ,  H01L29/0619 ,  H01L29/66333 ,  H01L29/66393

Abstract: A method for manufacturing a vertical power component on a silicon wafer, including the steps of growing a lightly-doped epitaxial layer of a second conductivity type on the upper surface of a heavily-doped substrate of a first conductivity type, the epitaxial layer having a thickness adapted to withstanding the maximum voltage likely to be applied to the power component during its operation; and delimiting in the wafer an area corresponding to at least one power component by an isolating wall formed by etching a trench through the epitaxial layer and diffusing from this trench a dopant of the first conductivity type of high doping level.