公开(公告)号：US09704967B2

公开(公告)日：2017-07-11

申请号：US14853719

申请日：2015-09-14

Applicant: STMicroelectronics S.A.

Inventor： Pascal Chevalier ,  Didier Celi ,  Jean-Pierre Blanc ,  Alain Chantre

IPC: H01L29/66 ,  H01L21/82 ,  H01L29/737 ,  H01L21/8249 ,  H01L27/06

CPC classification number: H01L29/66242 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66325 ,  H01L29/737 ,  H01L29/7378

Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.

公开(公告)号：US20140167116A1

公开(公告)日：2014-06-19

申请号：US14104993

申请日：2013-12-12

Applicant: STMicroelectronics S.A.

Inventor： Pascal Chevalier ,  Didier Celi ,  Jean-Pierre Blanc ,  Alain Chantre

IPC: H01L29/66 ,  H01L29/737

CPC classification number: H01L29/66242 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66325 ,  H01L29/737 ,  H01L29/7378

Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches,=; and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.

Abstract translation: 本公开涉及一种方法，其包括在第一和第二隔离沟槽之间的第一区域中暴露硅衬底的表面，在第一区域中蚀刻硅衬底以在第一和第二隔离沟槽之间形成凹陷， 以及通过在凹部中选择性地外延生长包含SiGe的膜来形成异质结双极晶体管的基极。

公开(公告)号：US09362380B2

公开(公告)日：2016-06-07

申请号：US14104993

申请日：2013-12-12

Applicant: STMicroelectronics S.A.

Inventor： Pascal Chevalier ,  Didier Celi ,  Jean-Pierre Blanc ,  Alain Chantre

IPC: H01L29/94 ,  H01L29/66 ,  H01L29/737 ,  H01L21/8249 ,  H01L27/06

CPC classification number: H01L29/66242 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66325 ,  H01L29/737 ,  H01L29/7378

Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, =; and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.

Abstract translation: 本公开涉及一种方法，其包括在第一和第二隔离沟槽之间的第一区域中暴露硅衬底的表面，在第一区域中蚀刻硅衬底以在第一和第二隔离沟槽之间形成凹陷， 以及通过在凹部中选择性地外延生长包含SiGe的膜来形成异质结双极晶体管的基极。