公开(公告)号：US20020163832A1

公开(公告)日：2002-11-07

申请号：US10100511

申请日：2002-03-18

Applicant: STMicroelectronics S.A.

Inventor： Bertrand Bertrand ,  Mohamad Chehadi ,  David Naura

IPC: G11C011/34

CPC classification number: G11C16/12 ,  G11C16/0433

Abstract: An electrically programmable and erasable memory includes memory cells connected to word lines and to bit lines arranged in columns. Bit lines selection transistors are driven by bit lines selection signals. Column selection latches each includes a locking element for a column selection signal and a circuit for delivering a gate control signal which depends on the output of the locking element. Each column selection latch delivers, in addition to a gate control signal, a bit lines selection signal. This signal depends on the output of the locking element at least during programming and reading phases of the memory cells.

Abstract translation: 电可编程和可擦除存储器包括连接到字线和排列成列的位线的存储器单元。 位线选择晶体管由位线选择信号驱动。 列选择锁存器各自包括用于列选择信号的锁定元件和用于传送取决于锁定元件的输出的门控制信号的电路。 每个列选择锁存器除了门控制信号之外还提供位线选择信号。 该信号至少在存储器单元的编程和读取阶段期间取决于锁定元件的输出。

公开(公告)号：US20020126534A1

公开(公告)日：2002-09-12

申请号：US10096531

申请日：2002-03-11

Applicant: STMicroelectronics S.A.

Inventor： David Naura ,  Bertrand Bertrand ,  Mohamad Chehadi

IPC: G11C016/04

CPC classification number: G11C16/12

Abstract: A circuit produces a voltage for the erasure or programming of a memory cell. The circuit includes a capacitor, and a discharge circuit connected to a first terminal of the capacitor. The discharge circuit includes a first transistor, a drain of which is connected to the first terminal of the capacitor. The first transistor activates the discharge circuit when a discharge signal is received by a gate of the first transistor. The discharge circuit includes a slow discharge arm and a fast discharge arm parallel-connected to the source of the first transistor. The discharge circuit produces a low discharge current or a high discharge current for discharging the capacitor as a function of an operating mode selection signal.

Abstract translation: 电路产生用于擦除或编程存储器单元的电压。 电路包括电容器和连接到电容器的第一端子的放电电路。 放电电路包括第一晶体管，其漏极连接到电容器的第一端子。 当放电信号由第一晶体管的栅极接收时，第一晶体管激活放电电路。 放电电路包括缓慢放电臂和与第一晶体管的源极并联的快速放电臂。 放电电路产生低放电电流或高放电电流，用于根据工作模式选择信号放电电容器。