公开(公告)号：US20030016764A1

公开(公告)日：2003-01-23

申请号：US10184035

申请日：2002-06-26

Applicant: STMicroelectronics S.A.

Inventor： Jean-Marc Brossier ,  Thierry Lenez

IPC: H04L027/06 ,  H03D001/00 ,  H03H007/40

CPC classification number: H04L7/0054 ,  H04L7/0029

Abstract: A receiver for a digital data transmission device for receiving a digital signal and comprising a free sampler physically taking samples rk of a received signal r(t) at a frequency at least equal to twice the received signal spectrum maximum frequency. A digital interpolator allows to derive a sequence of samples Xk calculated from said physical samples, according to a tuning parameter null. An equalizer adjustable to a set of equalization parameters e allows to process said interpolator output samples Xk. A computing unit simultaneously provides, in a single processing, values of null to the digital interpolator and values of the equalization parameters e to the digital equalizer. The invention also provides a method for digitally processing a received signal in a digital transmission device.

Abstract translation: 一种用于数字数据传输设备的接收器，用于接收数字信号并且包括以至少等于接收信号频谱最大频率的两倍的频率物理地采集接收信号r（t）的采样rk的自由采样器。 数字插值器允许根据调谐参数tau导出从所述物理样本计算的样本序列X k。 可调整到一组均衡参数e的均衡器允许处理所述插值器输出样本Xk。 计算单元在单个处理中同时提供对数字内插器的τ值和均衡参数e到数字均衡器的值。 本发明还提供了一种在数字传输设备中数字处理接收信号的方法。

公开(公告)号：US20030065463A1

公开(公告)日：2003-04-03

申请号：US10184017

申请日：2002-06-26

Applicant: STMicroelectronics S.A.

Inventor： Thierry Lenez ,  Eric Petit

IPC: G06F019/00

CPC classification number: H03H17/0275 ,  H03H17/0685

Abstract: A device for automatically converting a digital sample sequence X(n) inputted at a first frequency fe and converted into an output digital sample sequence Y(m) at a second frequency fs which is smaller than fe. An interpolator-decimator assembly having a decimation rate equal to null, selected so as to correspond to the frequency offset fe/fs is based on a polyphased filter having p tables of q elements each, said filter being designed such that samples X(n) are input at the fe frequency and table components are activated according to clocking of a second clock derived from the fe clock and wherein one clock pulse is removed.

Abstract translation: 一种用于自动转换以第一频率fe输入的数字采样序列X（n）并以小于fe的第二频率fs转换成输出数字采样序列Y（m）的装置。 具有等于​​γ的抽取率等于γ的内插器 - 抽取器组件基于具有每个q个元件的p个表的多相滤波器，所述滤波器被设计为使得样本X（n） 以fe频率输入，并且根据从时钟导出的第二时钟的时钟激活表分量，并且其中一个时钟脉冲被去除。