公开(公告)号：US20020114193A1

公开(公告)日：2002-08-22

申请号：US10057767

申请日：2002-01-24

Applicant: STMicroelectronics S.r.1.

Inventor： Federico Pio

IPC: G11C011/34

CPC classification number: G11C16/16

Abstract: A method of erasing a flash memory integrated in a chip of semiconductor material and including at least one matrix of cells with a plurality of rows and a plurality of columns made in at least one insulated body, the cells of each row being connected to a corresponding word line; the method includes the step of applying a single erasing pulse relative to a selected single one of the at least one body to a selected subset of the word lines for erasing the cells of each corresponding row made in the selected body with no intermediate check of the completion of the erasure.

Abstract translation: 一种擦除集成在半导体材料芯片中的闪存的方法，包括至少一个具有至少一个绝缘体中制成的行和多个列的单元阵列，每行的单元连接到相应的 字线 该方法包括以下步骤：将相对于所选择的至少一个主体中的所选单个擦除脉冲施加到所选择的字线的子集，以擦除在所选择的主体中形成的每个对应行的单元，而不进行中间检查 完成擦除。