公开(公告)号：US20040175927A1

公开(公告)日：2004-09-09

申请号：US10804492

申请日：2004-03-18

Applicant: STMicroelectronics S.r.I.

Inventor： Raffaele Zambrano ,  Cesare Artoni ,  Chiara Corvasce

IPC: H01L021/4763

CPC classification number: H01L27/11502 ,  H01L21/76877

Abstract: A process forms an integrated device having: a first conductive region; a second conductive region; an insulating layer arranged between the first and the second conductive region; at least one through opening extending in the insulating layer between the first and the second conductive region; and a contact structure formed in the through opening and electrically connecting the first conductive region and the second conductive region. The contact structure is formed by a conductive material layer that coats the side surface and the bottom of the through opening and surrounds an empty region which is closed at the top by the second conductive region. The conductive material layer preferably comprises a titanium layer and a titanium-nitride layer arranged on top of one another.

Abstract translation: 一种方法形成一种集成装置，其具有：第一导电区域; 第二导电区域; 布置在第一和第二导电区域之间的绝缘层; 至少一个通孔，其延伸在所述第一和第二导电区域之间的绝缘层中; 以及形成在所述通孔中并且电连接所述第一导电区域和所述第二导电区域的接触结构。 接触结构由覆盖通孔的侧表面和底部的导电材料层形成，并且包围由第二导电区域封闭在顶部的空区域。 导电材料层优选地包括彼此顶部布置的钛层和氮化钛层。

公开(公告)号：US20030146460A1

公开(公告)日：2003-08-07

申请号：US10327704

申请日：2002-12-20

Applicant: STMicroelectronics S.r.I

Inventor： Raffaele Zambrano ,  Cesare Artoni

IPC: G11C007/00 ,  G11C029/00 ,  H01L029/76 ,  H01L029/94 ,  H01L027/108

CPC classification number: H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75 ,  H01L28/91

Abstract: A memory cell of a stacked type is formed by a MOS transistor and a ferroelectric capacitor. The MOS transistor is formed in an active region of a substrate of semiconductor material and comprises a conductive region. The ferroelectric capacitor is formed on top of the active region and comprises a first and a second electrodes separated by a ferroelectric region. A contact region connects the conductive region of the MOS transistor to the first electrode of the ferroelectric capacitor. The ferroelectric capacitor has a non-planar structure, formed by a horizontal portion and two side portions extending transversely to, and in direct electrical contact with, the horizontal portion.

Abstract translation: 堆叠型存储单元由MOS晶体管和铁电电容器形成。 MOS晶体管形成在半导体材料的衬底的有源区中，并且包括导电区域。 铁电电容器形成在有源区的顶部，并且包括由铁电区域分开的第一和第二电极。 接触区域将MOS晶体管的导电区域与铁电体电容器的第一电极连接。 铁电电容器具有非水平部分形成的非平面结构，该水平部分横向于与水平部分直接电接触延伸的两个侧部。