公开(公告)号：US20040165434A1

公开(公告)日：2004-08-26

申请号：US10739928

申请日：2003-12-18

Applicant: STMicroelectronics S.r.I.

Inventor： Francesco Mastroianni ,  Massimiliano Scotti ,  Antonio Geraci ,  Andrea Pozzato

IPC: G11C011/34

CPC classification number: G11C16/10 ,  G11C2216/14

Abstract: A non-volatile memory device suitable to be programmed in a sequential mode. The device includes a plurality of blocks of memory cells each one for storing a word, each block being identified by an address. An input circuit for loading an input address at the beginning of a programming procedure and an internal circuit for setting an internal address to the input address. The device further includes a data input circuit for loading a predetermined number of input words in succession, and a latch circuit for latching a page consisting of the predetermined number of input words. The memory then executes a programming operation including writing the page in the blocks identified by consecutive addresses starting from the internal address, and increments the internal address of the predetermined number in response to the completion of the programming operation.

Abstract translation: 适用于以顺序模式编程的非易失性存储器件。 该装置包括多个存储单元块，每个存储单元块用于存储单词，每个块由地址标识。 用于在编程程序开始时加载输入地址的输入电路和用于将内部地址设置为输入地址的内部电路。 该装置还包括用于连续加载预定数量的输入字的数据输入电路和用于锁存由预定数量的输入字构成的页的锁存电路。 然后，存储器执行编程操作，包括在从内部地址开始的连续地址识别的块中写入页面，并且响应于编程操作的完成来增加预定数量的内部地址。