Reading circuit and method for a multilevel non-volatile memory
    1.
    发明申请
    Reading circuit and method for a multilevel non-volatile memory 有权
    多电平非易失性存储器的读取电路和方法

    公开(公告)号:US20020186592A1

    公开(公告)日:2002-12-12

    申请号:US10118660

    申请日:2002-04-08

    CPC classification number: G11C11/5642 G11C11/56 G11C11/5621 G11C2211/5632

    Abstract: Described herein is an asynchronous serial dichotomic sense amplifier comprising a first comparator stage having a first input receiving the cell current flowing in the multilevel memory cell, the content of which is to be read, a second input receiving a first reference current, and an output supplying the first of the bits stored in the multilevel memory cell; a multiplexer stage having a selection input connected to the output of the first comparator stage, a first signal input receiving a second reference current, a second signal input receiving a third reference current, and a signal output selectively connectable to the first or the second signal input depending on the logic level present on the selection input; and a second comparator stage having a first input receiving the cell current, a second input connected to the signal output of the multiplexer stage, and an output supplying the second of the bits stored in the multilevel memory cell.

    Abstract translation: 这里描述的是一种异步串行二点读出放大器,它包括第一比较器级,该第一比较器级具有接收在多级存储器单元中流动的单元电流的第一输入,其内容将被读取,接收第一参考电流的第二输入和输出 提供存储在多层存储单元中的第一位; 多路复用器级,其具有连接到第一比较器级的输出的选择输入,接收第二参考电流的第一信号输入,接收第三参考电流的第二信号输入和可选地可连接到第一或第二信号的信号 输入取决于选择输入上存在的逻辑电平; 以及第二比较器级,其具有接收单元电流的第一输入,连接到多路复用器级的信号输出的第二输入和提供存储在多电平存储单元中的第二位的输出。

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