公开(公告)号：US20020063268A1

公开(公告)日：2002-05-30

申请号：US10056564

申请日：2001-10-26

Applicant: STMicroelectronics S.r.I.

Inventor： Bruno Vajana ,  Matteo Patelmo

IPC: H01L021/82 ,  H01L027/10

CPC classification number: H01L27/11226 ,  H01L23/573 ,  H01L27/02 ,  H01L27/112 ,  Y10S257/922

Abstract: A read only memory (ROM) device includes a semiconductor substrate having a first type of conductivity, and a plurality of memory cells on the semiconductor substrate. Each memory cell includes first and second regions of a second conductivity type opposite the first conductivity type. A first dielectric layer is on the plurality of memory cells, and a plurality of first contacts extend through the first dielectric layer for contacting the first regions. A second dielectric layer is on the first dielectric layer and the plurality of first contacts. A plurality of second contacts extend through the second dielectric layer and overlie the corresponding second regions. The plurality of second contacts define interconnection contacts by further extending through the first dielectric layer for contacting the second regions for memory cells programmed in a conductive state, and false interconnection contacts by not extending through the first dielectric layer for contacting the second regions for memory cells programmed in a non-conductive state.

Abstract translation: 只读存储器（ROM）器件包括具有第一类型导电性的半导体衬底和半导体衬底上的多个存储单元。 每个存储单元包括与第一导电类型相反的第二导电类型的第一和第二区域。 第一介电层位于多个存储单元上，并且多个第一触点延伸穿过第一介电层以接触第一区域。 第二电介质层位于第一电介质层和多个第一接触件上。 多个第二触点延伸穿过第二介电层并且覆盖相应的第二区域。 多个第二触点通过进一步延伸穿过第一介电层来限定互连触点，以接触用于以导电状态编程的存储器单元的第二区域，以及通过不延伸穿过第一介电层以接触存储器单元的第二区域的假互连触点 编程在非导通状态。