公开(公告)号：US20240429928A1

公开(公告)日：2024-12-26

申请号：US18824653

申请日：2024-09-04

Applicant: STMicroelectronics S.r.I.

Inventor： Agatino Massimo Maccarrone ,  Antonino Conte ,  Francesco Tomaiuolo ,  Michelangelo Pisasale ,  Marco Ruta

IPC: H03M1/06

Abstract: In accordance with an embodiment, a digital-to-analog converter (DAC) includes: a W-2W current mirror comprising a first plurality of MOS transistors and a second plurality of MOS transistors, wherein ones of the second plurality of MOS transistors are coupled between adjacent ones of the first plurality of MOS transistors; and a bulk bias generator having a plurality of output nodes coupled to corresponding bulk nodes of the first plurality of MOS transistors, wherein the plurality of output nodes are configured to provide voltages that are inversely proportional to temperature.

公开(公告)号：US20230130268A1

公开(公告)日：2023-04-27

申请号：US17933972

申请日：2022-09-21

Applicant: STMicroelectronics S.r.I.

Inventor： Marco Ruta ,  Antonino Conte ,  Michelangelo Pisasale ,  Agatino Massimo Maccarrone ,  Francesco Tomaiuolo

IPC: G05F1/575 ,  H03K5/24 ,  H03K5/05

Abstract: A voltage regulator receives an input voltage and produces a regulated output voltage. A first feedback network compares a feedback signal to a reference signal to assert/de-assert a first pulsed control signal when the reference signal is higher/lower than the feedback signal. A second feedback network compares the output voltage to a threshold signal to assert/de-assert a second control signal when the threshold signal is higher/lower than the output voltage. A charge pump is enabled if the second control signal is de-asserted and is clocked by the first pulsed control signal to produce a supply voltage higher than the input voltage. A first pass element is enabled when the second control signal is asserted and is selectively activated when the first pulsed control signal is asserted. A second pass element is selectively activated when the second control signal is de-asserted.

公开(公告)号：US20230170914A1

公开(公告)日：2023-06-01

申请号：US18054333

申请日：2022-11-10

Applicant: STMicroelectronics S.r.I.

Inventor： Agatino Massimo Maccarrone ,  Antonino Conte ,  Francesco Tomaiuolo ,  Michelangelo Pisasale ,  Marco Ruta

IPC: H03M1/06

CPC classification number: H03M1/0604

Abstract: In accordance with an embodiment, a digital-to-analog converter (DAC) includes: a W-2W current mirror that includes a first plurality of MOS transistors having a first width, and second plurality of MOS transistors having a second width that is twice the first width, where ones of the second plurality of MOS transistors are coupled between drains of adjacent ones of the first plurality of MOS transistors; and a bulk bias generator having a plurality of output nodes coupled to corresponding bulk nodes of the first plurality of MOS transistors, wherein the plurality of output nodes are configured to provide voltages that are inversely proportional to temperature.