Abstract:
A circuit extends the output voltage range of an integrator circuit wherein the input signal is used to produce an output signal, and the voltage of the output signal develops monotonically within a predetermined range of possible values. The integrator circuit is driven within an integration time period such that each time the signal at its output reaches a limit of the range of values, the integrator circuit starts a subsequent integration stage of the input signal in which the output signal develops again within the above-mentioned range. This takes place by resetting the integrator circuit or by a reversal of the characteristic slope of the output signal. This is combined with storing the number of occasions on which these interventions have occurred as determined by a counter. This enables the actual voltage value of the signal resulting from the integration to be calculated by a relatively straightforward mathematical operation from the reading of the counter, and from the signal currently present at the output of the integrator at the end of the integration period.
Abstract:
A method and a corresponding decoder for decoding a Manchester encoded binary data signal includes receiving the Manchester encoded binary data signal having a first sequence of central bit transitions and a second sequence of initial bit transitions. A local clock signal is generated, and the central bit transitions of the Manchester encoded binary data signal are determined. Determination of the central bit transitions includes measuring the time interval elapsing between a pair adjacent central bit transitions, expressed as a number N of cycles of the local clock signal, and selecting each successive central bit transition based upon the time interval N measured between the pair of central bit transitions which immediately precede the successive central bit transition.