公开(公告)号：US10038575B1

公开(公告)日：2018-07-31

申请号：US15692202

申请日：2017-08-31

申请人： STMicroelectronics S.r.l.

发明人： Giovanni Steffan ,  Augusto Andrea Rossi ,  Emanuele Depaoli

IPC分类号： H04L25/03 ,  H04L25/06 ,  H04L27/06 ,  H04L27/20

CPC分类号： H04L25/03057 ,  H04L25/03203 ,  H04L25/03267 ,  H04L25/06 ,  H04L25/4917 ,  H04L27/01 ,  H04L27/02 ,  H04L27/06 ,  H04L27/2017

摘要： In some embodiments, a DFE including: an input terminal configured to receive an input signal carrying a plurality of symbols; an adder circuit coupled to the input terminal of the DFE; a plurality of comparator circuits configured to receive respective threshold signals; a plurality of slicer circuits coupled to respective comparator circuits of the plurality of comparator circuits; and a plurality of multiplier circuits coupled to respective slicer circuits of the plurality of slicer circuits, the plurality of multiplier circuits configured to multiply respective correction coefficients of a plurality of correction coefficients times respective outputs of respective slicer circuits to produce respective multiplication results of a plurality of multiplication results, where: the adder circuit is configured to subtract the plurality of multiplication results from the input signal, and the plurality of correction coefficients are independently adjusted based on a previously received symbol.