公开(公告)号：US12119746B2

公开(公告)日：2024-10-15

申请号：US17807466

申请日：2022-06-17

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Borghese ,  Mattia Carrera

IPC: H02M3/158 ,  H02M1/00

CPC classification number: H02M3/158 ,  H02M1/0016 ,  H02M1/0022 ,  H02M1/0025

Abstract: In an embodiment a circuit includes a voltage-controlled oscillator (VCO) circuit having a first node configured to receive a reference voltage, a second node configured to receive a feedback signal, which is a comparison signal, indicative of a variation of a regulated output voltage of an electronic voltage regulator with respect to the reference voltage and a third node configured to provide a clock signal having a clock period based on the reference voltage and the feedback signal, and a pulse-width modulated (PWM) signal generator circuit having a first node coupled to the VCO circuit and configured to receive the clock signal, a second node configured to receive an input signal proportional to an input voltage signal at an input node of the electronic voltage regulator and a third node configured to provide at least one PWM drive signal to one or more electronic switches of a switching stage based on the clock signal.

公开(公告)号：US20220416656A1

公开(公告)日：2022-12-29

申请号：US17807466

申请日：2022-06-17

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Borghese ,  Mattia Carrera

IPC: H02M3/158 ,  H02M1/08

Abstract: In an embodiment a circuit includes a voltage-controlled oscillator (VCO) circuit having a first node configured to receive a reference voltage, a second node configured to receive a feedback signal, which is a comparison signal, indicative of a variation of a regulated output voltage of an electronic voltage regulator with respect to the reference voltage and a third node configured to provide a clock signal having a clock period based on the reference voltage and the feedback signal, and a pulse-width modulated (PWM) signal generator circuit having a first node coupled to the VCO circuit and configured to receive the clock signal, a second node configured to receive an input signal proportional to an input voltage signal at an input node of the electronic voltage regulator and a third node configured to provide at least one PWM drive signal to one or more electronic switches of a switching stage based on the clock signal.