公开(公告)号：US11440794B2

公开(公告)日：2022-09-13

申请号：US16565803

申请日：2019-09-10

Applicant: STMicroelectronics S.r.l.

Inventor： Sonia Costantini ,  Davide Assanelli ,  Aldo Luigi Bortolotti ,  Michele Vimercati ,  Igor Varisco

IPC: G02B26/00 ,  B81C1/00 ,  B81B7/00 ,  B81B7/02 ,  G02B26/08 ,  H04N9/31

Abstract: A bottom semiconductor region is formed to include a main sub-region, extending through a bottom dielectric region that coats a semiconductor wafer, and a secondary sub-region which coats the bottom dielectric region and surrounds the main sub-region. First and second top cavities are formed through the wafer, delimiting a fixed body and a patterned structure that includes a central portion which contacts the main sub-region, and deformable portions in contact with the bottom dielectric region. A bottom cavity is formed through the bottom semiconductor region, as far as the bottom dielectric region, the bottom cavity laterally delimiting a stiffening region including the main sub-region and leaving exposed parts of the bottom dielectric region that contact the deformable portions and parts of the bottom dielectric region that delimit the first and second top cavities. The parts left exposed by the bottom cavity are selectively removed.