公开(公告)号：US20210026695A1

公开(公告)日：2021-01-28

申请号：US16924091

申请日：2020-07-08

Applicant: STMicroelectronics S.r.l.

Inventor： Emanuele PLEBANI ,  Mirko FALCHETTO ,  Danilo Pietro PAU

IPC: G06F9/50 ,  G06F9/48 ,  G06F9/54 ,  G06F9/32 ,  G06F12/06 ,  G06N3/063 ,  G06N3/04

Abstract: Methods, microprocessors, and systems are provided for implementing an artificial neural network. Data buffers in virtual memory are coupled to respective processing layers in the artificial neural network. An ordered visiting sequence of layers of the artificial neural network is obtained. A virtual memory allocation schedule is produced as a function of the ordered visiting sequence of layers of the artificial neural network, the schedule including a set of instructions for memory allocation and deallocation operations applicable to the data buffers. A physical memory configuration dataset is computed as a function of the virtual memory allocation schedule for the artificial neural network, the dataset including sizes and addresses of physical memory locations for the artificial neural network.