公开(公告)号：US20220293498A1

公开(公告)日：2022-09-15

申请号：US17688013

申请日：2022-03-07

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： Fulvio Vittorio FONTANA ,  Davide Maria BENELLI ,  Jefferson Sismundo TALLEDO

IPC: H01L23/495 ,  H01L23/16 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device, such as a Quad-Flat No-lead (QFN) package, includes a semiconductor chip arranged on a die pad of a leadframe. The leadframe has an array of electrically-conductive leads around the die pad. The leads in the array have distal ends facing away from the die pad as well as recessed portions at an upper surface of the leads. Resilient material, such as low elasticity modulus material, is present at the upper surface of the leads and filling the recessed portions. An insulating encapsulation is molded onto the semiconductor chip. The resilient material is sandwiched between the insulating encapsulation and the distal ends of the leads. This resilient material facilitates flexibility of the leads, making them suited for reliable soldering to an insulated metal substrate.