Process for reducing the second-order nonlinearity of a frequency transposition device and corresponding device
    1.
    发明申请
    Process for reducing the second-order nonlinearity of a frequency transposition device and corresponding device 审中-公开
    用于降低频移装置和对应设备的二阶非线性的过程

    公开(公告)号:US20040152435A1

    公开(公告)日:2004-08-05

    申请号:US10718493

    申请日:2003-11-20

    CPC classification number: H03D7/145 H03D7/1458 H03D7/1491 H03D7/165

    Abstract: A frequency transposition device includes a current switching circuit with two differential pairs of transistors being controlled by a local oscillator signal. In a current switching circuit calibration mode, the local oscillator is rendered inactive and the two pairs of transistors are calibrated in succession by zeroing the ground path current of one of the pairs of transistors not undergoing calibration, and by setting the voltage difference applied to the bases of the transistors of the pair of transistors undergoing calibration. This is done until the output voltage of the frequency transposition device is zeroed to within a predetermined accuracy. The base voltage difference obtained is stored after calibration. In a normal operating mode the local oscillator is rendered active, and the two stored voltage differences are applied to the respective bases of the two differential pairs of transistors.

    Abstract translation: 频率转置装置包括具有由本地振荡器信号控制的两个差分对晶体管的电流切换电路。 在当前的开关电路校准模式中,本地振荡器变为无效,并且两对晶体管被连续校准,通过使未进行校准的晶体管对之一的接地路径电流归零,并且通过将施加到 一对晶体管的晶体管的基极进行校准。 直到频率转置装置的输出电压被调零到预定精度为止。 获得的基准电压差在校准后存储。 在正常操作模式中,本地振荡器被激活,并且两个存储的电压差被施加到两个差分对晶体管的相应基极。

Patent Agency Ranking